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All digital electronics equipment is made up of just a
few basic building blocks known as digital logic circuits. Those basic circuits are combined in a variety of
ways to process the binary data used in communications, computation, or control applications.
Digital logic circuits typically accept two or more
binary inputs and generate a single output. The output
state is determined by the binary states of the input
and the special processing characteristics of the
digital logic circuit. Typically, the electronic circuit
itself is not shown, because it is basically irrelevant.
Only the logical functioning of the circuit is of interest.
Most digital logic circuits are called gates.
The basic function of a digital logic circuit is to
make a decision. The logic circuit looks at the state of
the input signals, then makes a decision and generates
an output. Those digital logic circuits are then combined in a variety of ways to form larger, more
sophisticated circuits called combinationallogic
circuits.
There are five basic digital logic circuits. They are
the AND gate, the OR gate, the inverter, the NAND gate,
Fig.1  the generic
hypothetical digital
logic circuit is
usually referred to
as a gate.
90
SILICON CHIP
BINARY {
INPUTS
~ BINARY
~OUTPUT
INPUT ~__.........__ OUTP'!J
A ~ B= A
Fig.2 
I N P U T ~ OUTP~T
A ~ B= A
logic symbols for an inverter.
and the NOR gate. The AND, OR and inverter circuits
are really the core elements while the NAND gate and
NOR gate are special combinations of the basic three,
as you will see later. All digital equipment is made up
of those simple elements.
The Inverter
The simplest digitallogic circuit is the inverter. It
has a single input and a single output. Its primary
function is to invert a logic signal. It converts a binary
O [low) into a binary 1 [high) and a binary 1 into a
binary 0.
The logic symbol used to designate an inverter is
shown in Fig.2. The triangle typically represents the
electronic circuitry while the circle, which can be
shown at the output or input [more commonly at the
output), represents the inversion process.
The output of an inverter is simply the opposite of its
input. In digital terminology, we say that an inverter
generates an output which is the complement of the
input.
The operation of an inverter, or any other logic circuit for that matter, is usually expressed in one of
three ways: a truth table, a Boolean algebra expression, or a waveform timing diagram. Let's look at all
three for the inverter.
Timing Diagrams
INPUT A
OUTPUT B
Fig.3 
input and output waveforms of an inverter.
A truth table is nothing more than a chart that
shows all the possible combinations of inputs and outputs of a logic circuit. A truth table (Table 1) for an inverter is shown below.
The input and output binary signals in Truth Table_ 1
are identified by letters of the alpha bet as seen m
Figs.2 and 3.
TABLE 1
INVERTER TRUTH TABLE
B
(Output)
A
(Input)
0
1
1
0
In the truth table for the inverter (Table 1), the lefthand column represents all possible input combinations. With a single input line, only two possible states
are possible. Naturally, only two output states are
possible. Note that the output is the complement of the
input.
Another method of expressing the operation of a
logic circuit is to use Boolean algebra. Boolean
algebra was invented by mathematician George Boole
and is a simple mathematical way to show what's going on in digital logic circuits.
A Boolean expression is nothing more than a simple
formula that expresses the output in terms of th(;l input. The output and the input are given a lett_er o~ letter/number designations. They are shown m Figs.2
and 3. The Boolean expression for an inverter is:
B=A
The way to read the above equation is: output B is
equal to NOT A. The bar over the input designation A
is called a NOT bar or NOT symbol. It is used to denote
inversion. What that simple algebraic expression tells
you is that if the input is A, then the output Bis NOT~In other words, if the input is 0 (low), then the output 1s
NOTO; ie it is 1 (high). An inverter is also referred to as
a NOT circuit.
Instead of the NOT bar which is an unusual symbol
and difficult to type and print, an asterisk or prime
symbol is often used to show inversion as indicated
below:
B
=
A* or B
=
A'
Another way of showing the operation of a logic circuit is to use timing diagrams. These diagrams show
the actual input and output waveforms that occur.
Those waveforms are what you would expect to see if
you were monitoring the input and output signals on a
multitrace oscilloscope. Fig.3 shows the typical input
and output waveforms of an inverter.
The waveforms typically shown in timing diagrams
are usually shown in their ideal form. That means thai.
the waveforms are perfectly square, with vertical
sides and flat tops. In reality, digital signals are not
that perfect. Fig.4 shows what real logic signals would
look like on an oscilloscope when the sweep period is
very brief. The waveforms are those that you would
see at the input and output of a typical inverter
circuit.
First, note that the sides of the waveform in Fig.4
are not perfectly vertical. The waveform rises or falls
linearly. This means that the transition between the
binary 0 and 1 states (or between binary 1 and 0) is not
instantaneous. While digital logic circuits switch
rapidly, it does take a finite period of time for the logic
state to change.
The times involved in changing states are referred
to as the rise time and the fall time. The rise time is
the amount of time it takes the logic signal to rise from
10% to 90% of its full amplitude value. The fall time is
the time it takes for the logic signal to drop from 90%
to 10% of its full amplitude value. Rise and fall times
can be measured on an oscilloscope screen if the
scope has a calibrated timebase.
Another factor to be considered is propagation
delay. This is the delay time between the arrival of an
input signal to a logic device and the delivery of the
output signal.
For example, in an inverter, when the input rises
from 0 to 1, the output of the inverter does not
simultaneously drop from 1 to 0. There is a time delay
between the input and output. This time pe~iod is the
propagation delay. It is measured between the 50%
amplitude points on the corresponding input and output waveforms as detailed in Fig.4.
.
All digital logic circuits have propagation delay.
Granted they are very short, less than 10 nanoseconds
in most circuits. For many applications, this is such a
small time that the response is essentially considered
to be instantaneous.
The AND Gate
The term gate is used to describe a digital logic circuit with two or more inputs and a single output. The
expression gate is metaphorical and tends to describe
how a typical digital circuit functions. For example,
when a gate is open, a logic signal passes. If the gate is
closed, a logic signal is blocked.
The two basic kinds of logic gates are AND and OR.
When these are combined with an inverter, they form
the other two types of gates, NAND and NOR. We will
consider the AND gate first.
The basic logic symbol used to represent the AND
DECEMBER1987
91
~
::::0
z = xv
A
A2 O = P   D = (AOXA2XA5)
A5
Fig.5  logic symbols for the
TABLE 2
AND TRUTH TABLE
FOR TWO INPUTS
PROPAGATION
DELAY
TIME
Inputs
Fig.4  inverter input and output waveforms illustrating
rise and fall times and propagation delay.
IPUT A
PUT B
PUT C
11
12
I
I
13
15
I I
II
J
14
16
17 18
19
I I I
I
nI
I
I
I
I
PUT D
n_
n_
I
Fig.6  input and output waveforms for a 3input
I
AND
gate.
gate is shown in Fig.5. Two, three and fourinput AND
gates with their inputs and outputs labelled are
shown.
In operation, an AND gate generates a binary 1 output if all of its inputs are binary 1's. If any one or more
of its inputs is binary 0, the output is a binary 0.
A truth table clearly shows the operation of an AND
gate. For example, take a look at Table 2 which shows
the operation of a 2input AND gate.
Here there are two inputs, X and Y. With two inputs, there will be 2 to the second power (2 2 } or four
possible input conditions. There is also an output Z
that occurs for each different set of inputs. Note that a
binary 1 output appears only when both inputs are
binary l's.
Now take a look at the truth table for a 3input AND
gate (Table 3}.
With three inputs, there can be a total of 23 or eight
possible states. Again, the output is binary 1 only
when all three inputs are binary 1.
The Boolean expression for an AND gate with inputs
X and Y and output Z is simply:
92
SILICON CHIP
=
X.Y
=
XY
X
z
0
0
1
1
0
1
0
1
0
0
0
1
Inputs
TIME
Z
Output
y
TABLE 3
AND TRUTH TABLE
FOR THREE INPUTS
I
I
gate.
AND
X
y
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Output
z
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
1
To read the above algebraic expression, you say
that Z equals X ANDY. The dot between the two inputs
designates the AND function. But in most cases, the dot
is omitted and the input terms are simply written adjacent to one another as they would be if the terms were
to be multiplied as in a standard algebraic expression.
Sometimes, parenthesis are used to separate the inputs when multiple letters or letter/number designations are use, eg:
F
=
(J2)(L7)
Fig.6 shows typical timing diagrams for a 3input
AND gate. Carefully observe the states of each input
and check how they correspond to the output. As you
can see, a binary 1 output pulse occurs only when the
three inputs are simultaneously binary 1's. That
characteristic has led to the AND gate being described
as a coincidence circuit, since the output occurs only
during the coincidence of the binary 1 states.
At times t 1 through t 5 , the three inputs are never
high at the same time. However, beginning at time t 6
and ending at time t 7 , the three inputs are all high so
that output D goes high.
One of the most common applications for an AND
As for its function, an OR gate generates a binary 1
output if any one or more of its inputs is binary 1. The
output of the OR is zero only when all of its inputs are
zero. Table 4 shows the basic operation of a 2input OR gate.
Note that those three input combinations where
binary 1 's occur on either or both inputs generate a
binary 1 output.
The Boolean expression for the OR function is shown
below:
CK
CTL _ _ _
___.I
J
OUTPUT1
Fig.7 
gating with an
AND
gate.
gate is gating input. Fig.7 illustrates the concept. Here
a clock signal from an oscillator clock (CK) is applied
to one input. A control signal (CTL) is applied to the
other. The purpose of the control signal is to literally
open or close the gate. When the CTL signal is binary
0, the gate is closed. Any time an input to an AND gate
is binary 0, the output is correspondingly a binary 0.
When the CTL signal is binary 1, the gate is enabled
and the clock signal applied to the other input passes
through to the output. As long as the CTL signal is
binary 1, the clock signal will pass through.
The OR gate
The other basic logic circuit is the OR gate. It can
have two or more inputs and a single output. The symbol used to represent the OR gate is shown in Fig.8.
~::::DJ
AX~
T: ~ D4
11
Fig.8  logic symbols
and Boolean algebraic
expressions for an OR
gate.
= K+L
12
= AX +T9 +G
13
14
I I I
15
16
17
18
I    ....I
.
19
110
I I
INPUT K
n
I
INPUTL
''
I
!''
I
L
=
K
+
L
To read that equation we say that J equals K or L.
The plus sign indicates the OR function. The Boolean
expression for the 3input OR gate in Fig.8 is:
D4 =AX+ T9 + G
Fig.9 shows the operation of an OR gate using two input waveforms. The rise and fall times and propagation delays are not shown to simplify the illustration.
Follow each input waveform and note the output condition for the binary 1 input condition. For example,
input K goes high causing output Jto go high at time t 1 .
At time t 2 input K goes low, but input L is high; thus
output K remains high until time t 3 when both inputs
are low.
An OR gate is a useful logic function as it allows two
or more individual signals to control a single output. A
simple application in shown in Fig.10. Here a cooling
fan motor is controlled by the output of the OR gate.
The fan motor may be turned on or off by two
separate inputs to the OR gate. The first input is a
temperature sensor. When the temperature rises, the
temperature sensor switch closes and + V (binary 1) is
applied to one input of the OR gate. The other input to
the OR gate is a manually operated switch which can
be turned off and on to control the motor. When either
input is a binary 1, the fan will turn on .
The resistors at the inputs to the OR gate keep the input states at binary 0 until a switch closes. Since the
logic OR chip is rated for small signals only, a driver
stage is inserted into the circuit to provide the power
switching required to control the motor.
I
TEMPERATURE
SENSOR
OUTPUT J
~FAN
I
TIME
Fig.9 
input and output waveforms for an OR gate.
FAN
MOTOR
TABLE 4
OR TRUTH TABLE
FOR TWO INPUTS
Inputs
K
L
0
0
1
1
0
1
0
1
Fig. 10
Output
J
Fig.to  using an OR gate to select active
input to control the operation of a fan motor.
NAND and NOR Gates
0
1
1
1
The use of an inverter immediately at the output of
AND and OR gates makes possible NAND and NOR gates.
For example, Fig.11 shows a NAND gate. It is made up
with an AND circuit followed by an inverter. This cir
DECEMBER 1987
93
~
~ ~ z = xv
NANO CIRCUIT
Fig.11 
=
TABLE 6
OR/NOR TRUTH TABLE
FOR TWO INPUTS
xv
NANO SYMBOL
NANO
t1
:::Boz
12
gate circuit [left) and logic symbol.
13
14
I I I
no
15 16 t7 18
19
I II I
I I I
Inputs
111
INPUT X
INPUT Y
OUTPUT Z
Fig.12  input and output waveforms for a 2input
NANO.
cuit is usually represented by a single symbol which is
the AND symbol with a circle at its output to indicate
inversion.
The operation of a NAND gate is simple to deduce. It
is the output result of an AND gate inverted. This is
illustrated in the NAND truth table (Table 5).
TABLE 5
NAND TRUTH TABLE
Outputs
Inputs
X
y
AND
NAND
0
0
1
1
0
1
0
1
0
0
0
1
1
1
1
0
For a twoinput NAND gate, the output is binary 1 if
either or both inputs are at binary 1. The output only
changes state to binary O when both inputs are at
binary 1.
The Boolean expression for a NAND gate is also simple to understand. It is simply the AND expression with
a NOT bar over all inputs as shown below:
D = EFG
The operation of a NAND gate is illustrated by the
waveforms in Fig.12. Note that the only time the output is a binary O is when both inputs are simultaneously binary 1. The output pulses occur during time
periods t 2t~, t 6t 7 and t 10t 11 .Check the inputs during
those periods and you'll discover that they are high. At
all other times, one or both inputs are low.
A NOR circuit is shown in Fig.13 . It is an OR gate
followed by an inverter. The special symbol used to
represent that circuit is the OR symbol with a circle at
its output to indicate signal inversion.
Table 6 shows the operation of the NOR gate. The
output of the NOR gate is simply the inverted or complement output of the standard OR gate with identical
inputs.
: ~ C = A+B
NOR CIRCUIT
:::::DoNOR SYMBOL
Fig.13  NOR logic circuit and logic symbol.
94
SILICON CHIP
C = A+B
Outputs
A
8
OR
NOR
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
0
The waveforms in Fig.14 illustrate the operation of
the NOR gate. Here the output is a binary O when any
one or more of the inputs are binary 1. Note that the
NOR output occurs only during periods t 3t 4 and t 7t8 •
Verify that statement by using the NOR truth table
(Table 6).
In fact, now would be a good time to quickly review
all the truth tables (Tables 1 to 6) to be sure that you
fully understand the operation of the AND, OR, NAND
and NOR circuits.
NAND and NOR Applications
All five basic logic circuits are available in integrated circuit form. A typical digital logic IC is the
popular 4001 quad 2input CMOS NOR shown in
Fig.15.
While any of the basic logic functions can be obtained in IC form, the most widely used are the NAND and
NOR gates. They can be interconnected to perform
basic AND, OR and inverting functions. For example, a
NAND or a NOR gate can be used as an inverter as
shown in Fig.16. To do that, all the inputs are connected together to form a single input. The resulting
circuit operates just like an inverter.
A NOR gate can be used for the OR function by simpt1
INPUTAJ
I
12
13
14 15
16
I
I
I
I
I I
I
wI
I
INPUT 8
17
1a
I
..._____.I
OUTPUT C
Fig.14 
input and output waveforms for a 2input NOR.
ORIENTATION NOTCH
3
7"
GNO
Fig.15  pictorial diagram for the 4U01 CMOS quad
2input NOR integrated circuit.
x~x
NOR
NANO
Fig.16 
and NOR gates connected to
perform as inverters.
NAND
Fig.17  NOR and
NAND gates
converted to OR and
~ ~ F T = FT
(a)
(b)
(c)
(d)
Fig.18  using
(b)
AND,
ly connecting an inverter at its output. The inverter
complements the output back to the standard OR output (Fig.17a). Similarly, a NAND gate can be converted
to an AND function by feeding its output through an inverter as shown in in Fig.17b.
Several other variations of making AND and OR
gates from NANDs and NORs are shown in Fig.18. For
example, a NAND gate can be used as an OR circuit by
connecting inverters ahead of the inputs (Fig.18a).
When used in that way, the NAND circuit is sometimes
represented by the special symbol shown in Fig.18b.
This is an OR symbol with circles at the inputs to
and NORs for
operations.
NANDs
OR
and
AND
designate that special function.
You can also use a NOR gate as an AND. Again all
you have to do is connect inverters to the two inputs as
shown in Fig.18c. When a NOR gate is used in that
way, the special symbol shown in Fig.18d is sometimes
used.
The short quiz that follows will help you review the
main facts presented in the above article. Answering
those questions will help you apply what you have
learned to reinforce your knowledge.
Reproduced from HandsOn Electronics by arrangement.
Gernsback Publications, USA.
©
SHORT QUIZ ON DIGITAL LOGIC CIRCUITS
1 . The output of the circuit shown below is :
f>oC>o?
BINARY O
a. binary O
b . binary 1
2. The output of an inverter is said to be the _ __
of the input.
3 . The circuit generating the output waveforms
shown below is a(n):
INPUT A
J
INPUT B
OUTPUT C J
n
L
AND
function?
:::0 ::::Dt>(b)
(a)
8. The time shift between the output and input of a
logic circuit is referred to as _ _ _ _ _ _ __
Lil
c.
9 . A 4 input NANO gate will have how many possible input and output states?
a. 4 b. 8 c. 16 d. 32
OR
4 . A coincidence circuit is a(n):
a. AND b. NOR c. inverter
5 . The Boolean expression for a
a. C =A+ B + C
b. C = ABC
c. C = ABC
7. Which ci rcuits below perform the
I
I
a. inverter b. AND
d. NANO e. NOR
6. Which of the following is the truth table for a
gate?
a. 0 0 0
b. 0 0 1
c. 0 0 0
d. 0 0 1
0 1
0 1 1
0 1 0
0 1 0
1 0 1
1 0 1
1 0 0
1 0 0
1 1 1
1 1 0
1 1 1
1 1 0
NOR
NOR
ANSWERS TO QUIZ
gate is:
d. C = A = B = C
9~ =
6 x 6 x 6 x 6 = i,G ·o ·5
ABl8P uo,ie5ed0Jd ·g
o pue q 'e 'L
80N ·p ·g
8 = 8 = V = 8 ·e .9
oNv ·e ·v
80
·o '8
lLiawa1dwoo · G
~
AJBU!q ·q . ~
DECEMBER1987
95
