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The highs & lows of
AID & DIA conversion
If you're new to electronics, then the idea of turning
analog signals into digital highs and lows is probably
~ little hard to understand. In this article, we'll
explain some of the basics behind this important
area in electronics.
H
ple like talking in TLAs, or threeletter acronyms?)
A microprocessor is one of those
reasonably long ICs you'll see if you
look inside your CD player. It controls
the opening and closing the CD tray,
the motor that spins the CD and where
the laser diode sits to play the next
track.
However, microprocessors and
computers in general can only deal
with information
that is in the form
of a series of 1's and
By DARREN YATES
O's (or binary digits), yet very few
scribed is an example of converting real life situations produce their redigital data (you pressing the switch) sults in a neat series of 1 's and O's.
Most electrical parts such as mointo analog voltages (the CD player
operating a motor which opens and tors, amplifiers and the like are operated by applying some known voltage
closes the tray).
It is an example of what is often to them. For example, the motor in a
called a microprocessorcontrolled toy car spins when the battery is condevice or MCD. (Isn't funny how peo nected to it.
Computers and microprocessors
cannot generate these voltages on their
own, nor can they understand these
voltages if they are from sensing devices such as thermometers.
This is where analogtodigital and
digitaltoanalog converters come into
play.
Say you were going to take temperature measurements every couple
of hours or so and you wanted to store
the readings in a computer. We'll assume that you'll be using an electronic temperature measuring device
that produces some voltage for a given
temperature.
If we feed this analog voltage,
through an analogtodigital converter
(ADC), we get a digital row of l's and
O's, known as a "word". The computer can now take this data in and
recognise what it means through some
software.
If you were going to control a motor
AVE you ever considered how
your CD player works? You take
the compact disc out of its protective
jacket, you press the OPEN/CLOSE button on your CD player and the CD tray
rolls out. You then place the CD in the
tray, press the OPEN/CLOSE button
again, and the player swallows your
disc and produces clean, crisp stereo
sound.
The very process we have just de
.__..___ _ _ _ _ _ _ _ _ _ _ _0 2.5V
ANALOG
0 VOLTAGE
4R
OUT
EACH BIT: 1 =VREF (+SV)
0 = ov
Fig.1: an R2R4R ladder network is the simplest DIA
converter available. The resistor network simply
behaves as a voltage divider.
4
SILICON CHIP
SR
16R
32R
64R
128R
LSB
0
Fig.2: the equivalent circuit for an R2R ladder
network when a logic 1 is applied to the MSB & all
other inputs are at logic O.
L       DIGITALDATAIN58
  
MS~
ANALOG
:>0 VOLTAGE
2R
OUT
Fig.3: this DIA converter uses just two resistor values & allows for easy
expansion of the number of inputs. The output is buffered by an op amp
wired as a voltage follower stage
using your computer, connecting the
digital data straight to the motor won't
do the motor or the computer any
good. A computer on its own, can
only supply an ON/OFF control because of its digital nature. If we want
to use computer data to vary the speed
of the motor, we have to feed the
digital output into a digitaltoanalog
converter (DAC), which produces a
fixed voltage for a given word. The
output of the DAC is then fed to the
motor.
Binary weighting
Before we start talking further about
ADCs and DACs, let's discuss how
the conversion scale works.
Let's say our computer can produce
TABLE 1
(8)
(4)
(2)
LSB
(1)
FRACT.
0
0
0
0
1/16
0
0
0
1
2/16
0
0
1
0
3/16
0
0
1
1
4/16
0
1
0
0
5/16
0
1
0
1
6/16
0
1
1
0
7/16
0
1
1
1
8/16
1
0
0
0
9/16
1
0
0
1
10/16
1
0
1
0
11 /16
1
0
1
1
12/16
1
1
0
0
13/16
1
1
0
1
14/16
1
1
1
0
15/16
1
1
1
1
16/16
MSB
an output of four bits in a row; eg,
1111 (it could be any combination of
1's and 0's). To get precise values from
this 4bit word, we give each bit a
numerical weighting.
If we take our 4bit word, the least
significant bit (LSB) is the one on the
righthand side and the most significant bit (MSB) is on the lefthand side.
The LSB is worth 1, the next lowest
is worth 2, the next 4 and the MSB is
worth 8. If you look at Table 1, you
can see how we can get individual
values from 0 to 15 by just changing
the pattern of 1 's and 0's.
How it works
In operation, an analogtodigital
converter takes the analog voltage we
give it and compares it to an analog
reference voltage. Let's say we feed in
a voltage of 2.5V and our reference
voltage is 5V.
The ADC compares the two and
produces the digital word "1000" at
its output. If you look back at our
chart in Table 1, this word corresponds
to the decimal number 8. So how does
this happen?
Our input voltage of 2.5V is exactly
half that of our reference voltage of
5V. The ADC then produces the dig
ital equivalent in its range; ie, half of
16 is 8. We then send this off to the
computer, which recognises the value
as half its maximum possible value.
In this case, the LSB is worth 1/16
of the maximum value or in other
words, we can get one of 16 possible
readings. In most real situations, this
isn't enough and so the number of
bits is increased to 8 or, for really
precise measurements, to 16 bits.
Ifwe consider 16 bits and give each
bit a weighting of double the previous
one (ie, 1, 2, 4, 8, 16 etc), the 16th and
most significant bit will have a weighting of 32,768. If we add all of these
together, we get 65,536 possible combinations (zero to 65,535) .
Your CD player uses 16 bits to turn
the digital data back into a smooth
analog voltage which then goes to your
stereo amplifier.
DIA converter types
We'll start by looking at how we
can make a DAC and by explaining
how they work, as they are crucial to
understanding how an ADC works.
There are a number of different
types of DAC, each differing in size,
speed and cost.
R2R4R DIA converters
The simplest way to produce a DAC
is to connect resistors to the digital
output lines, join them all together
and then take the analog voltage from
the junction.
If you look at Fig.1, the resistor
connected to the MSB has a value of
R, the next smallest bit has a resistor
of value 2R, and so on. Since each bit
has the same output voltage  ie, either 5V or 0V  the resistor network
LSB
2R
2R
2R
R
2R//2R = R
2R//(R+R) =R
(1/4)
(1/2)
2R
2R
.,.
2R
2R
R
Fig.4: these three
diagrams show how
the resistor values in
Fig.3 are built up.
Note that the output
impedance at each
node in the resistor
string is simply R.
R
2R(R+(2R//(R+R))) =R
(1/2)
.
SEPTEMBER 1991
5
"UNITS"
1
D
20R
40R
0
LSB
MSB
10R
"TENS"
64
D
D
1
D
MSB
LSB
2R
R
SOR
BR
4R
Fig.5: basic scheme for a (BCD) binary coded decimal DIA converter. Note that
each resistor in the tens digit is 10 times greater than its corresponding bit
resistor in the units digit. This DAC works the same way as a binary DAC,
except that we only use the first 10 possible values (09).
the R2R DAC shown in Fig.3. Let's
see how this circuit works.
If you look at it, each bit is half the
value of the next significant bit. In
order to get the correct voltage ratio,
the resistors between two consecutive bits must appear as half.
The circuit in Fig.3 achieves this
even though it may not be apparent at
first glance, so let's build it up a bit at
a time.
Fig.4 shows the progression as the
circuit is built up. If we work out the
parallel resistance in each stage, the
total value should come to a value of
acts like a giant voltage divider.
If we feed in the word "1000000",
we have a potential divider consisting of resistance R in series with the
parallel combination of the seven
other resistors. You can see this in
Fig.2. Because all the other bits are
zero, it's as if we connected the resistors to ground. These seven resistors
in parallel give a value of R (or very
close to R). In effect then, we have a
potential divider with two resistors of
value R.
Basic electronics tells us that the
voltage at the junction of the two resistors will be half the applied voltage. In our case, 5V was fed in, so we
get 2.5V at the junction .
The MSB has a weighted value of
half the total range. In this case, the
MSB has a weighting of 128 and the
total range is 256. So with our initial
5V going into resistor R, we get 2.5V
at the output.
The problem though, is finding a
suitable value of resistor. If we make
R a value of 1kQ (a normal digital
output should have a much greater
load than this), then our largest resistor needs to be 128kQ. Now you can't
buy a 128kQ resistor.
The DAC we've just described is
only an 8bit version. If we extend it
to 16 bits, then the largest resistor has
to be 32,768 times the value we specify
as R (a 32. 768MQ resistor?).
R.
This means that the voltage we get
from each bit is half that of the next
significal).t bit, which is just as we
want. The value in brackets shows
how much each bit contributes to the
overall voltage if that bit is high.
We can then feed the output of the
DAC to an analog buffer to produce a
lowimpedance analog voltage as
shown in Fig.3.
BCD DIA converter
On many occasions, particularly in
digital multimeters, simple binary
weighting is replaced by a binarycodeddecimal (BCD) number. This is
a 4bit binary word which goes from 0
to 9. If you go back to Table 1 and
ignore the last six lines , any one of the
first 10 lines constitutes a BCD
number.
Fig.5 shows a practical circuit of a
2digit BCD DAC. If the binary equiva
R2R DIA converter
A clever solution to this problem is
rMSB
R
r
"UNITS" ~
LSB
2R
4R
MSB
R
BR
4.8R
LSB
2R
4R
R
BODOR.
The solution, shown in Fig.6, is
similar to the R2R solution we have
already explained, except in this case
a resistor of value 4.8R is placed in
series between each digit. This allows
us to make the resistors in each corresponding digit the same, so that we
only have a ratio of eight between the
highest and lowest resistor values.
Switches
In each case above, we have assumed that the digital bit coming into
the DAC is the reference voltage; ie, if
a high is represented by 5V, then 5V is
the reference point.
In practice, each bit is used to operate a switch which switches in the
correct reference voltage, and not just
the digital input to the DAC. This
way, a much more accurate and precise reference level is produced. Fig. 7
shows an example of this.
AID converters
So how about AID converters then?
Well, there are a number of wellknown and some notsowellknown
types of ADCs, differing in size, speed
and cost.
Counter AID converter
The slowest and bestknown type
is the counter ADC. A block diagram
of this type of counter is shown in
"HUNDREDS"~
MSB
BR
lent of the number 64 is applied to the
DAC, the output will be 641100 x VREF
(ie , 5V), which is 3.2V.
The way this works is that each bit
of the tens digit has a resistance of 10
times Jess than the corresponding bit
in the units digit so that it supplies 10
times the voltage. Each digit works
the same way as the normal binary
DAC, except that we only use the first
10 possible values (09).
Again, though, we have the problem that as we go up in the number of
digits, the resistance in the lower digits must go up in response. So if we
had a 4digit number, the resistance
in the LSB of the units digit would be
LSB
2R4R
BR
4.BA
ANALOG
,.........ovoLTAGE
OUT
6
SILICON CHIP
Fig.6: the solution to the
problem in Fig.5 is to install a
4.8R resistor in series between
each set of digit resistors, as
shown here. This allows us to
use the same value resistors
for each digit.
Fig.7: in a practical DIA
converter, the incoming
digital data activates
CMOS switches. These
then switch a reference
voltage to the resistor
network to ensure
accurate levels.
.'Ylfll'r  
OOUTPUT
:
Fig.8. It works as follows:
When the circuit is first switched
on, the counter output is zero. The
digital word, containing all zeros, is
fed to a DAC, such as shown in Fig.3.
The analog output is fed into the inverting input of the op amp, which
compares the DAC output to the incoming voltage.
If the incoming voltage is higher,
the output of the comparator goes high,
enabling the counter to count up. As
the digital word increases, the DAC
output rises correspondingly until the
DAC output is higher than the incoming voltage. At this point, the comparator output goes low, disabling the
counter. The digital word at the counter output is then the digital value of
the incoming voltage.
Because they can only increment at
the rate of the LSB , counter ADC's are
very slow and so are not used where
conversion speed is important (eg, in
DAT recorders). Sample and hold circuitry also has to be added into circuits like this to hold the analog value
RESET
while the counter works its way up to
the correct value.
Tracking AID converter
Fig.9 shows a simple but more useful variation of the counter ADC. Instead of an ordinary up counter, an
up/down counter is used, and the
output of the comparator is fed to the
up/down control input. Let's look at
how it works.
Again, we assume that the counter
reads zero when the circuit is first
turned on. The output of the counter
is fed into the DAC, whose output is
fed back into the inverting input of
the comparator. If the DAC output is
lower than the input voltage, then the
output of the comparator will be high,
allowing the counter to count up.
So, up to this point, it is similar in
operation to the first ADC we considered.
However, when the output of the
DAC is higher than the input voltage,
the comparator output goes low and
this now forces the counter to count
I
UP
COUNTER
COMPARATOR
I
I
I
Another type of ADC, often used in
digital multimeters, is the integration
or dualramp ADC, an example of
which is shown in Fig.10. These are
used in systems requiring moderate
cost and high accuracy but where
speed of conversion is not a priority.
It works like this: The analog signal
is applied to the integrator and, at the
same time, a counter is enabled and
begins counting the incoming clock
pulses.
When the counter reaches a certain
count (after a predetermined time, T),
the control logic switches from the
input voltage to a reference voltage,
which is opposite in polarity.
The counter at this time is reset and
begins counting again, while the integrator begins slowly ramping down to
ov.
This is a very linear ramp because
DIGITAL
OUTPUT
MSB
UP/DOWN
COUNTER
I
I
Integration AID converters
RESET
DIGITAL
OUTPUT
MSB
down. It continues to count down
until the DAC output falls below the
input voltage, at which point the counter is forced to count up again.
As you can see, this type of ADC
tracks the input voltage automatically
and continuously. In the first ADC we
described, the counter had to be reset
after each conversion .
Although Fig. 9 represents a big improvement in performance, we still
have the problem of it incrementing
at the LSB rate. So for an 8bit ADC, it
will take 256 clock cycles to go from
minimum to maximum value.
This is too slow for a CD player, for
example, but this type of ADC is often
used in less critical applications.
DAC
DAC
OUTPUT
DAC
LSB
LSB
CLOCK
Fig.8: the simplest AID converter is based on an UP
counter, a DAC & a comparator. When the output of the
DAC is lower than the input to the comparator, the
counter counts up. It stops when the DAC output rises
above the incoming voltage, at which point the counter
is disabled. The digital word at the output of the counter
then represents the incoming voltage.
ANALOG
tOOUTPUT
CLOCK
Fig.9: basic scheme for a tracking AID converter. It uses
an UP/DOWN counter instead of the UP counter shown
in Fig.8. This means that the counter can be clocked in
either direction in response to the signal from the
comparator stage & thus the counter accurately tracks
the input. The advantage of this scheme is that the
counter does not have to be reset after each reading.
SEPTEMBER 1991
7
START
CONVERSION
RESET
OMPARATOR
CONTROL
LOGIC
l
+1/2:21\(v;;,+VREF)T
/RC
VREF t,t/RC
~
COUNTER
COMPARATOR IS TRIPPED WHEN
+1/2('v,;;+VREF)T/RC = VREFt,t/RC
of the reference voltage, so that when
the voltage of the integrator reaches
OV, the value on the counter represents the digital proportion of VrN/
VREF·
Integrating ADCs are often used in
digital multimeters as their accuracy
is independent of clock frequency and
the capacitor value in the integrator.
This is because the up and down
slopes are equally affected.
Successiveapproximation
When speed and accuracy are important, the successiveapproximation
ADC is the most costeffective and
requires only the number of bits plus
one or two clock cycles to complete a
conversion. In a 16bit converter, for
example, something like 1718 clock
cycles are required, regardless of the
input voltage range.
A block diagram and a basic timing
interval are shown in Fig.11.
Instead of comparing the input voltage to the entire range of values (which
depends on the number of bits}, it
compares it to each of the bits in turn.
Starting off with the MSB, if the
input voltage is higher than the DAC
output with that bit being set (which
would give a DAC output of half the
full scale}, then the MSB becomes a
"1". If the input is lower than that bit,
then it is set to "O".
The next least bit down, which is
COMPARATOR
ANALOG
INPUT 0         t
SIGNAL
FS
ANALOG INPUT
+1/16FS
__ l __
618
ANALOG
REFERENCE
4/8
218
STATUS
(BUSY)
SERIAL OUTPUT
CLOCK
>CLOCK OUTPUT
~==TE=sT,.._'=TE==s=!T':T=es=T~TIME
MSB
BIT 2
BIT 3
(b)
(a)
Fig.11: the successiveapproximation AID converter is the most costeffective
scheme where speed & accuracy are important (eg, computer interfaces). In a
16bit converter, it requires only 1718 clock cycles to complete a conversion,
regardless of the input voltage range. Unlike other AID converters which
compare the input voltage to the entire range of values, this AID converter
compares the input voltage to each of the bits in turn.
8
SILICON CHIP
DIGITAL OUTPUT
(OFFSET BINARY
OR 2's COMP.)
j
t,t/T(PROPORTIONAL TO FS COUNT): 1/2 ((v,°w'/REF) +1)
START
CONVERSION
CLOCK
Fig.10: an integrating or
dualramp AID converter.
Integrating ADCs are often
used in digital multimeters
where speed of conversion
is not a priority, as their
accuracy is independent of
clock frequency and the
capacitor value in the
integrator.
1/4 full range, is added to the previous bit and their combined value compared against the input voltage. If the
DAC voltage exceeds the input, then
that second bit is set to "O", but if it
doesn't exceed the input, it is set to
"1". You can see this in the timing
interval diagram.
The process continues until the LSB
is tried and set. After that, the value of
the digital output register is the digital value of the input.
Because it must repeatedly compare each bit with the input voltage, a
sample and hold input stage is re
quired to keep the input from changing.
The speed and accuracy of this type
of ADC allows it to be used in computer interfaces and in highspeed data
acquisition systems such as digital
storage CROs.
The foregoing is essentially a brief
overview of what analogtodigital and
digitaltoanalog conversion is all
about. It is by no means complete as
there are some schemes that have not
been included due to space restrictions. But, as a starting point, it should
set you in the right direction.
It's even possible to build up a couple of the simpler ADCs and DACs
using common op amps and a few
CMOS counters and gates. Why not
experiment with them yourself?
0
References
(1) "AnalogDigital Conversion
Handbook", 3rd edition, PrenticeHall, 1986.
(2) "Digital/ Analog and Analog/Digital Conversion Handbook", Motorola
1980.
SC
