This is only a preview of the September 1993 issue of Silicon Chip. You can view 29 of the 96 pages in the full issue, including the advertisments. For full access, purchase the issue for $10.00 or subscribe for access to the latest issues. Items relevant to "Stereo Preamplifier With IR Remote Control; Pt.1":
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Items relevant to "Build A +5V To +/-12V DC Converter":
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94 Silicon Chip
POWER
SOCKET
EXTERNAL
INPUT
VIDEO
IN
VIDEO
OUT
11
10
8
SEE TEXT
4.7k
1.5k
1.2k
Q3
5.6k
10k
6.8k
7
6
100uF
680
Q6
150
2.2k
0.1
100uF
5
470W
100uF
10uF
7805
0.1
D3
4
1
270pF
75k
6
7
8
Q5
9
10
4
100uF
470
0.1
VR3
4.7k
6.8k
1M
IC1
4066
1
47pF
11
IC2
4070
100pF
9
10k
100
1k
2.2k
Q4
1.2k
Q2
D1
1.5k
1.2k
0.1
1
2 100k
3
D2
10k
4.7k
1k
Q1
82
Colour Video Fader, August 1993:
there are several anomalies between
the circuit and the wiring diagram.
Also, due to spreads in the 4030/4070
XOR gates, it has been found necessary
to make a number of changes. These
corrections and changes are included
on the revised wiring diagram reproduced here and this must be followed
if you are building the project. Kitset
suppliers have been advised of these
changes.
The changes are as follows: the 22kΩ
resistor between the base of Q5 and
the +5V supply rail should be 2.2kΩ;
the 1kΩ resistor between the base of
Q5 and the emitter of Q3 should be
1.2kΩ; and the 220Ω resistor at the
emitter of Q4 should be 100Ω. On the
wiring diagram, the connections to
the video input socket are reversed.
The 220pF capacitor at pin 4 of IC2b
should be changed to 270pF.
The 10kΩ and 12kΩ resistors connected in series between the +5V supply and ground at pin 2 of IC1a should
be replaced with a 20kΩ trimpot (VR3).
This trimpot should connect between
the +5V and ground supply rails with
the wiper connecting to pin 2 of IC1a.
A hole will need to be drilled in the
PC board to take the trimpot wiper.
The trimpot will allow adjustment for
correct sync pulse triggering by IC2a.
VR3 is set up by first applying a
video signal to the video input and
viewing the output signal on your TV
set (via your VCR). Rotate the Fade and
Wipe controls fully clockwise with the
wipe direction switch in the R-L position. Initially, centre VR3, then adjust
anticlockwise until the picture starts
to roll. Note this position. Now adjust
VR3 clockwise and note the position
that the picture completely loses sync.
Finally, set VR3 in-between these two
positions. The picture should now be
in lock and the Wipe and Fade controls
should operate.
Having set the sync levels with
VR3, the 10kΩ resistor at the base of
Q3 may need to be adjusted to set the
black level. You only need to do this
if the wipe and fade controls do not
provide a satisfactory black picture. If
the picture is still visible on full fade
or wipe, reduce the value of the 10kΩ
resistor to 8.2kΩ. If this value does not
provide sufficient brightness when the
fader control is fully anticlockwise you
may need to use a value between 10kΩ
Fig.1: this revised
wiring diagram for
the Colour Video
Fader includes
all the changes
described in the
text. Note that you
will have to drill
an extra hole in
the board to mount
trimpot VR3.
470
Notes & errata
5
2
3
S1
1
VR1
and 8.2kΩ. This is achieved using
paralleled values; eg, 10kΩ in parallel
with 100kΩ gives 9.1kΩ.
We also recommend earthing the
potentiometer cases with a lead back
to the video input socket as shown on
the revised wiring diagram.
Studio Twin 50 Stereo Amplifier,
April, May 1992: since this amplifier
was published, it has enjoyed modest
popularity in the marketplace although the kit has since been discontinued. Part of the reason is that the
original Darlington transistors have
become virtually unobtainable.
A number of kits have been supplied
with TIP142/147 Darlingtons made by
SGS-ATES and these have been found
to be thermally unstable. If a Studio
Twin 50 using these Darlingtons is left
on long enough, it will most probably
burn them out. The reason appears
to be that the SGS transistors do not
have the same bias and thermal characteristics as the Philips TIP142/147
transistors used in the original design.
So as originally presented, the circuit
is not thermally stable with these SGS
transistors.
Our remedy has been to modify the
Vbe multiplier (Q17) and to increase
VR2
the source degeneration resistors in
the output stage.
To be specific, the Vbe multiplier (Q7) is now a BD679 Darlington
transistor and the resistor between its
base and collector has been reduced
from 680Ω to 330Ω. The 0.47Ω emitter
resistors have been increased to 1Ω.
This will slightly reduce the maximum
power output. We have also reduced
the quiescent current setting to around
25mA. These changes make the amplifier thermally stable but even so, its
quiescent current stability is still not
as good as would be the case with the
originally speci
fied Philips TIP
142/
TIP147 Darlington transistors.
Amateur Radio, August 1993: the
article on satellites requires a number
of corrections. In Fig.1(a) page 73, the
equations for apogee and perigee are
transposed. Perigee height = a(1-e)
- 6378km; apogee height = a(1+e)
- 6378km. In Fig.1(b), the veloci
ty of a low orbit satellite should be
26,000km/h not 13,000km/h. On page
74, in the paragraph beginning “AO-21
is a LEOS ... ”, the sentence referring
to apogee and perigee heights should
read: “Apogee and perigee heights
are 1000km and 958km respectively”.
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