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Precision
Electronics
Part 3: difference & instrumentation amplifiers
In this third article in this series, we will further develop our precision current
measuring circuit. We will consider how to sense the current if the shunt was in the
positive line instead of referenced to circuit ground.
By Andrew Levido
Y
ou will recall that previously, we
sensed a 0 to 1A current using a
100mW resistor, one side of which
was connected to circuit ground. We
amplified the resulting voltage by a
factor of around 25 to get a ground-
referenced signal of about 2.5V fullscale, which we could apply to an
analog-to-digital converter (ADC) to
make the measurement.
We are assuming there is a microcontroller in the circuit that can trim
out much of the fixed offset and gain
error, leaving us with a trimmed precision of around ±0.04% at 25°C with
about ±0.075% additional error over
the 0–50°C operating temperature
range. We deemed this overall precision of just over 0.1% ‘good enough’
for our purposes.
In practice, we often want to sense
the current in the positive leg of the
circuit, as shown in Fig.1. The reason
is that it is possible (sometimes even
unavoidable) that the grounds of both
the source and the load are connected
to a common potential, such as mains
Earth.
If this were to happen with the original circuit, the sense resistor would
be shorted out, so measuring the current would be impossible.
Moving the shunt resistor to the
positive line solves that problem but
introduces another. One terminal
of the resistor is sitting at the load’s
positive supply voltage (up to 20V in
our example), while the other is up
to 100mV higher, depending on the
current through it. We are interested
in amplifying only the difference in
voltage between these two points, not
the much larger voltage on which it
is floating.
We also want the resulting amplified signal to be referenced to circuit
ground so it’s within the ADC’s range,
and so we don’t need to use a differential ADC to measure it.
Fig.1: to measure current with a
sense resistor in the positive line,
we need to extract the relatively
small differential signal from the
larger common-mode signal.
Fig.2: to achieve what we need in
Fig.1, the “Signal Conditioning” box
needs to amplify Vdm with a high gain
(Gdm) but minimise the contribution of
Vcm, meaning Gcm should be kept low.
42
Silicon Chip
Differential and common
mode signals
In cases like this where we have two
sense terminals, we refer to the voltage
between them as the differential-mode
voltage (Vdm) and the voltage at the terminals with respect to ground as the
common-mode voltage (Vcm). This is
shown diagrammatically in Fig.2.
The differential voltage of interest
(Vdm) is ‘riding on’ the common-mode
voltage (Vcm) that we want to ignore.
For ground-referenced signals, the
common-mode voltage is zero (in an
ideal world, anyway).
The output of the generalised conditioning circuit block will be a voltage that is the sum of the differential-
mode input (Vdm) multiplied by a
differential-
mode gain (Gdm), along
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with the common-mode input (Vcm)
multiplied by the common-mode gain
(Gcm). We usually want Gcm to be zero
(or as close to it as we can practically
get) so that the unwanted common-
mode voltage is rejected.
We describe the degree to which a
circuit like this rejects common mode
signals as the common-mode rejection
ratio (CMRR). This is the ratio of the
differential-mode gain to the common-
mode gain (Gdm ÷ Gcm) and is usually
expressed in decibels, calculated as
20log10(Gdm ÷ Gcm).
You have probably guessed by now
that any hope of perfectly rejecting
common-mode signals (ie, achieving
an infinite CMRR) is just a pipe dream.
The harsh reality of electronics design
means we always have to put up with
something less than perfection.
Difference amplifiers
One of the most common ways to
amplify a small differential signal riding on a large common-mode voltage is
to use a difference amplifier like that
shown in Fig.3.
Two pairs of matched resistors (R1a
= R1b & R2a = R2b) and an op amp form
an amplifier with some very interesting characteristics.
This general form of difference
amplifier (with separate sense and
reference terminals) is a very flexible
Fig.3: the classic difference amplifier
using an op amp and four resistors
is a very useful and flexible circuit.
Usually, the value of R1a is the same
as R1b and R2a the same as R2b.
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circuit that can be used to implement
a wide variety of functions, as shown
in Fig.4.
All those circuits use a difference
amplifier with unity gain (R1a = R1b
= R2a = R2b).
The terms “difference amplifier”
and “differential amplifier” are often
used interchangeably. I am using the
former term to describe any amplifier
in which the output is proportional
to the difference between the input
voltages.
Some sources use “differential
amplifier” as the general term and
“difference amplifier” to describe
the specific configuration where the
differential-mode gain is equal to one
(eg, siliconchip.au/link/ac1h).
To add to the confusion, the terms
“differential amplifier” and “fully differential amplifier” are both used to
describe op amps with complimentary
positive and negative outputs. These
are specialised devices are normally
used to drive high-speed twisted pairs
or differential input ADCs
Getting back to the device itself, connecting the sense terminal of a difference amplifier to the output and the
reference terminal to ground produces
the familiar configuration illustrated
in Fig.5. This has a differential-mode
gain of Gdm = R2 ÷ R1 (where R1 = R1a
= R1b and R2 = R2a = R2b).
The common-mode gain of the difference amplifier would be zero if
the op amp was ideal and the resistor
matching was perfect. If you build a
difference amp with a typical op amp
with an open loop gain of 100,000 and
1% resistors, the CMRR would be in
the region of 34dB.
This means you would see about
1/50th of the common-mode voltage
at the output. That would equate to
400mV in our example, almost half
of the differential-mode signal we are
interested in!
We can do better with matched resistors. For example, using the ACASA
range of resistor arrays we used last
time (matched to within 0.05%), we
would have a CMRR in the order of
60dB. That still means we would see a
common-mode voltage of up to 20mV
at the output, which is clearly not good
enough for our application.
You can buy integrated difference amplifiers with on-board lasertrimmed resistors that have CMRR
values in the 80-100dB range at modest cost. If we used one of these, say
with a CMRR of 90dB, the common-
mode voltage at the output would
be just 632µV. That is pretty good,
but it still represents a 0.025% error,
which will have to be added to the
other errors.
There is a bigger problem, however.
Off-the-shelf difference amplifiers are
typically only available with gains up
to about 10, with most having a gain
of just one or two (we will see why a
little later).
Another limitation of difference
amplifiers is their relatively low input
impedance, typically in the range
of 10-500kW. That is not much of a
problem with a very low impedance
source such as our 100mW shunt, but
it becomes more of a concern as the
source impedance rises.
You can see from Fig.5 that any
source impedance will be in series
with the difference amplifier’s input
resistors R1a and R1b, potentially
impacting both the gain and CMRR.
A good rule of thumb is to make
sure the source impedance is lower
than the input impedance of the difference amplifier by the same order
of magnitude as the CMRR. So, for
a difference amplifier with a 90dB
CMRR and 10kW input resistors, the
source impedance should be less than
316mW. Any higher than that and the
CMRR will be adversely impacted.
Fig.5: this configuration delivers
a ground-referenced voltage
proportional to the difference
between the input voltages; Vout =
(R2 ÷ R1) × (Vin+ – Vin–).
In fact, the data sheets generally
specify CMRR with an input source
impedance of 0W. That is obviously
a totally unrealistic scenario – yet
another reason to be wary of data
sheet claims.
You might think that the CMRR
would be maintained if you had equal
source impedances on each input,
since both input resistors would be
increased by the same amount, but
no such luck. The manufacturer’s
laser-trimming matches the R1/R2
ratios in each divider, not necessarily
their absolute values, which may be
a bit different.
Adding the same source resistance
to both inputs will likely unbalance
the ratios, making the CMRR worse.
By now you might be asking why
we should even bother with difference amplifiers if they have all these
limitations. Apart from the flexibility
we have already seen, and their role
in instrumentation amplifiers that
we will discuss soon, the difference
amplifier excels in the area of input
common-mode voltage range.
With the right resistor values, the
common-mode voltage can extend
well beyond the op amp’s power supply rails. Off-the-shelf devices are
readily available with common mode
input ranges better than ±100V. I have
built discrete difference amps with
Fig.4: eight possible ways to use the Fig.3 circuit to achieve different gains, level-shift signals and even sum/average
voltages.
siliconchip.com.au
Australia's electronics magazine
January 2025 43
Table 1: error budget for Fig.8 using an INA821
At Nominal 25°C
Abs. Error
Error
Nominal Value
Shunt Resistor: RESI PCSR2512 (0.5%, 15ppm/˚C)
100mW
Differential Voltage due to I × Rshunt
100mV
0.5mV
InAmp: INA821 (Vos ±35µv, 5µV/˚C)
0mV
0.035mV
InAmp Input Voltage total (Line 2 + Line 3)
100mV
0.535mV
0.54%
0.1625mV
0.163%
InAmp Gain Resistor Rg: RN73C2A (0.1%, 10ppm/˚C)
2kW
2W
0.10%
0.5W
0.025%
InAmp Gain (Line 5 × Line 6)
25.7
0.0296
0.12%
0.0289
0.113%
Vout DM (Line 4 × Line 7)
2.57V
0.0167V
0.65%
0.0071V
0.275%
Vout CM (20V, 120db, ±1.5db over 0-50˚C)
0V
0.02mV
Vout (Line 8 + Line 9)
2.57V
0.0167V
Instrumentation amplifiers
One obvious solution to the difference amplifier’s input impedance
problem is to add a pair of unity-gain
input buffers in front of the input resistors, as shown in Fig.6. This solves
the input impedance problem (at the
expense of common mode voltage
range), but does nothing to help us
reach higher gains or achieve better
CMRR.
The classic three-op-amp instrumentation amplifier (or ‘inamp’)
shown in Fig.7 is a neat solution to
the problem. The two input op amps
now work to maintain the differential-
mode voltage across resistor Rg. With
this understanding, it is pretty easy to
show that this input stage has a differential mode gain of Gdm = 1 + 2 ×
(R3 ÷ Rg) and a common mode gain
of Gcm = 1.
We can see that with the right choice
of resistor values, this input stage can
improve the overall circuit’s differential gain but, given it has a common-
mode gain of one, it may not be as obvious how this front-end can improve
the overall CMRR.
Consider a situation where we want
an overall differential gain of 100 and
the highest possible CMRR. Imagine
the difference amplifier has a differential gain of 1 and a CMRR of 80dB. The
input stage will have a differential gain
of 100 and a common-mode gain of 1,
giving a CMRR of 40dB. The second
stage adds 80dB of additional CMRR
for a total circuit CMRR of 120dB.
The instrumentation amp is effectively a gain stage with a CMRR equal to
the gain, followed by a common-mode
rejection stage with a differential gain
Fig.7: the classic threeop amp instrumentation
amplifier consists of a
high impedance gain
stage made up of two
op amps followed by
a difference amplifier.
This can provide
both higher gain and
improved CMRR
compared to difference
amplifier alone.
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0.50%
Australia's electronics magazine
Rel. Error
0.038%
0.0375mV
0.038%
0.125mV
0.02%
Fig.6: this circuit
fixes the low input
impedance exhibited
by difference amplifiers
but it limits the input
voltage range and does
not add gain.
44
Abs. Error
0.50%
InAmp Gain Error (0.015% ±35ppm/˚C)
common mode voltages up to ±300V
without problems (but a lot of care).
Rel. Error
0-50°C (Nominal ±25°C)
0.088%
0.0038mV
0.65%
0.0071V
0.275%
of unity or thereabouts. You can now
see why lots of the difference amps on
the market favour CMRR over gain –
they are intended for use in instrumentation amplifier applications.
Another nice feature of the instrumentation amp is that the gain can be
set by changing just one resistor, Rg.
This means practical devices can have
precision-trimmed matched resistors
R1a/b, R2a/b and R3a/b, leaving the
user to provide Rg externally to set
the gain. You can even switch in different resistors to change the gain or
use a potentiometer to trim it.
A typical example of an off-theshelf instrumentation amplifier is the
INA821 from Texas Instruments (TI).
The data sheets show it has a CMRR
of 112dB for Gdm = 10 and 132dB for
Gdm = 100. This suggests they are getting 92dB of CMRR from the difference
amp stage (and 20dB or 40dB from the
input stage).
The input impedance is 100GW,
which should be high enough for
pretty much any source impedance.
The cost of the INA821 is about $8.60
in single quantities, which is much
cheaper than anything you could build
yourself, given the very tight-tolerance
resistor matching required.
Let’s go through the process of
designing the circuit of Fig.8 to compare with the ground-referenced circuit we built last time. We will build
up the error budget shown in Table 1
as we go.
Fig.9 shows the internal configuration of the INA821. We need a gain
of around 25, so we will choose Rg to
be 2kW, giving a gain of 25.7. The tolerance of this resistor is not critical
since we’ll trim the gain, but we do
care about its tempco. For this reason,
I chose the RN73C2A2K0BTD from TE
siliconchip.com.au
Table 2: error budget for Fig.8 using an LT1167A instead
At Nominal 25°C
Abs. Error
Error
Nominal Value
Shunt Resistor: RESI PCSR2512 (0.5%, 15ppm/˚C)
100mW
Differential Voltage due to I × Rshunt
100mV
0.5mV
InAmp: LT1167A (Vos ±40µv, 0.2µV/˚C)
0mV
0.04mV
InAmp Input Voltage total (Line 2 + Line 3)
100mV
0.54mV
0.54%
0.0425mV
0.043%
InAmp Gain Resistor Rg: RN73C2A (0.1%, 10ppm/˚C)
2kW
2W
0.10%
0.5W
0.025%
InAmp Gain (Line 5 × Line 6)
25.7
0.0308
0.12%
0.0129
0.050%
Vout DM (Line 4 × Line 7)
2.57V
0.017V
0.66%
0.0024V
0.093%
Vout CM (20V, 106db over 0-50˚C)
0V
0.1002mV
Vout (Line 8 + Line 9)
2.57V
0.0171V
Fig.8: an off-the shelf
instrumentation amplifier
(‘inamp’) can provide the
necessary gain (about 25) with
around 120dB of common-mode
rejection.
siliconchip.com.au
Abs. Error
0.50%
InAmp Gain Error (0.02% ±10ppm/˚C)
Connectivity. It has a tolerance of 0.1%
and a tempco of ±10ppm/°C.
The INA821’s input common mode
voltage range extends to within 2V
of either supply rail, so we need a
power supply of 22V or more on the
positive side and -2V or more on the
negative side.
I am going to assume we have a
+24V DC supply available, since this
would be the sort of input the power
supply’s series pass stage would need.
I have already used ±5V power rails
in my previous experiments, so I will
power the instrumentation amplifier
from +24V and –5V rails.
The INA821 has a maximum power
supply voltage of 36V, so this should
be fine, with a total of 29V applied
(24V + 5V). It is worth noting that it is
quite OK to power op amps asymmetrically like this, as long as you understand that the input common mode
range and output swing will likewise
be asymmetrical.
We can now complete the error budget table (Table 1). The first 8 lines of
the table are similar to the previous
examples, arriving at a cumulative
error of 0.65% with an additional
Rel. Error
0-50°C (Nominal ±25°C)
0.50%
0.038%
0.0375mV
0.038%
0.005mV
0.02%
0.275% error over the 0°C to 50°C temperature range.
Unlike the previous circuit, we
now need to add the error due to the
common-mode signal making its way
through to the output. With a gain of
25.7, we can estimate the CMRR to be
120dB based on 92dB for the difference amp stage plus 20log10(25.7) =
28dB for the input stage.
With a common-mode voltage of
20V, we will therefore see 20µV at
the output. That’s insignificant compared to the 16mV of error due to the
differential-mode stage.
The change in CMRR with temperature is a bit harder to estimate. TI provides graphs that show the temperature variation of CMRR for five sample
devices at gains of one and ten. From
these, I have taken a value ±1.5dB over
0°C to 50°C. It is a bit of a guesstimation, but it does not matter since the
overall level of common-mode feedthrough is so low as to make this figure irrelevant.
The net result is shown therefore
shown at the bottom of Table 1. The
worst-case untrimmed error at 25°C
is ±0.65%, just a little worse than
the ±0.55% error for the ground-
referenced circuit. In both cases, most
of this error is the 0.5% shunt resistor
tolerance.
Rel. Error
0.025%
0V
0.66%
0.0024V
0.093%
Unfortunately, the circuit’s performance over the temperature range
is not great. We are seeing ±0.275%
error, with two major contributors:
the instrumentation amplifier’s input
offset voltage drift and its gain drift.
The LTC2057-based circuit was much
better at 0.075%, as we would expect
from an auto-zero op amp.
Doing better – but at a price
I wanted to see if we could improve
on this, so I looked for a ‘better’ instrumentation amp. The LT1167A fits the
bill. Its input offset voltage at 25°C is
similar to the INA821, but its offset
drift is 25 times better at 0.2µV/°C. Its
gain drift with temperature is also better at ±10ppm°/C, compared with the
±35ppm/°C. Table 2 shows the error
budget for this version of the circuit.
As an aside, it’s a good idea to create these error budget tables in a program like Excel or LibreOffice Calc. I
set up the formulas so that I can easily
try new parts and have the whole table
recalculate automatically.
Compared to the INA821, the new
circuit shows a similar error at nominal temperature of ±0.66%, but an
error over the temperature range
three times better at 0.093%. So, we
should use this device, right? Well,
the LT1167A costs $30 each in one-off
Fig.9: the
INA821 has six
laser-trimmed
precision
resistors and
three op amps.
The user must
provide an
external resistor
(Rg) to set the
overall gain.
Australia's electronics magazine
January 2025 45
Fig.10: the measured untrimmed data for the INA821based circuit shows about 0.3% gain error; most of this is
due to the shunt resistor tolerance.
quantities, so we would want to be certain there was no alternative.
It should however come as no surprise that precision components that
are at the very extremes of performance will be costly. The manufacturers know full well that if there are
no or few alternatives, you will have
to pay up.
Test results
I spared no expense and tested both
devices. I built the circuits and measured the input current vs output voltage characteristics with both zero and
the full common-mode voltage of 20V.
The results for VCM = 20V are
shown in Tables 3 and 4, and plotted
in Figs.10 & 11.
For the INA821, the untrimmed
errors range from 0.01% at zero current to around 0.33% at 1A. The
results were a little better with zero
common mode voltage. As expected,
this is better than our error budget’s
0.65% worst-case estimate. The errors
increase steadily with the magnitude
Fig.11: the untrimmed data for the LT1167A-based circuit
shows the same 0.3% gain error as Fig.10 but has more offset
error. It should perform better over the temperature range.
of current, suggesting a gain error is
the main contributor.
The graphed results and line of best
fit shows this to be the case. The offset
correction we need to apply is very low
(around 250µV) and the gain error is
about 0.3% (the measured gain is about
0.3% higher than we expect). Again,
the shunt resistor with its 0.5% tolerance is likely to be the culprit.
After correcting the results, we get a
trimmed error of ±0.03%, very comparable with the ground-referenced circuit. However, our concern with the
INA821 circuit is its performance over
temperature.
The measured CMRR of this circuit was 106dB – not as good as the
estimates of 120dB, but nevertheless
acceptable. It’s actually a bit difficult to measure CMRR, since things
like op amp input offset voltage can
also change over the common-mode
range, and it’s impossible to isolate
the causes with a simple output voltage measurement.
The LT1167A circuit has worse
Table 5: theoretical improvement to Table 1 with dynamic zero trim
untrimmed accuracy, peaking at
almost 0.47%, but again the graphs
show it to be almost all gain error.
After trimming, the error is reduced to
±0.025%, very similar to the INA821.
The temperature coefficient is better,
of course.
Another solution
Rather than commit to a $30 chip,
I want to introduce another trick we
can use to improve precision in this
type of situation.
So far, we have applied fixed offset
and gain corrections to minimise the
static errors in the circuit. In practice,
this would be done for each sample in
software, based on some one-off calibration performed at a standard temperature when we initially set up the
instrument (and maybe when we periodically re-calibrated it).
Another approach might be to try
to obtain the corrections in real-time
at the ambient operating temperature.
High-end instruments, like the 6½
digit multimeters that I used to obtain
At Nominal 25°C
Abs. Error
Rel. Error
0-50°C (Nominal ±25°C)
Error
Nominal Value
Shunt Resistor: RESI PCSR2512 (0.5%, 15ppm/˚C)
100mW
Abs. Error
Differential Voltage due to I × Rshunt
100mV
0.5mV
InAmp: INA821 (Vos ±35µv, 5µV/˚C) – zero trimmed
0mV
0.035mV
InAmp Input Voltage total (Line 2 + Line 3)
100mV
0.535mV
0.54%
0.0375mV
0.038%
InAmpGain Resistor Rg: RN73C2A (0.1%, 10ppm/˚C)
2kW
2W
0.10%
0.5W
0.025%
0.50%
InAmp Gain Error (0.015% ±35ppm/˚C)
0.50%
Rel. Error
0.038%
0.0375mV
0.038%
0mV
0.02%
0.088%
InAmp Gain (Line 5 × Line 6)
25.7
0.0296
0.12%
0.0289
0.113%
Vout DM (Line 4 × Line 7)
2.57V
0.0167V
0.65%
0.0039V
0.150%
Vout CM (20V, 120db, ±1.5db over 0-50˚C)
0V
0.02mV
Vout (Line 8 + Line 9)
2.57V
0.0167V
46
Silicon Chip
Australia's electronics magazine
0.0038mV
0.65%
0.0039V
0.150%
siliconchip.com.au
Measured Data
I (mA)
Fig.12: we can improve the
temperature-dependent error of
the circuit by adding switches to
dynamically measure the offset, like
an auto-zero op amp.
the results shown here, effectively
perform a zero and full-scale calibration every 20ms measurement cycle.
Any temperature drift is calibrated out
more-or-less in real-time.
We are not aiming for anything near
that level of precision, but a simpler
version can be a useful technique. It
is pretty difficult to do a full-scale
calibration of our test circuit, as we
would need a precision 1A current
source, but we could do a zero calibration fairly easily.
This won’t let us trim out gain drift
due to temperature but would let us
calibrate out temperature-dependent
offset errors in real-time – a bit like
auto-zero op amps do.
Let’s take a look at this approach
using the INA821 example. Looking
at the error budget table, we can see in
line 3 that we have a possible ±125µV
drift in offset voltage over the temperature range. If we could calibrate that
out, as shown in Table 5, we would
almost halve the temperature error
from ±0.275% to ±0.15%.
Fig.12 shows one way we could
achieve this in practice. Normally, S1
would be closed and S2 open so that
we could take current measurements
as before. Opening S1 and closing S2
shorts the inputs of the instrumentation amplifier so that we can use the
ADC to read the circuit’s offset voltage.
We would still need a fixed gain correction as before, but we can use the
zero-scale reading to create a dynamic
offset correction that will eliminate
some of the temperature drift error.
Extending the range
Let’s regroup and consider what we
have achieved so far.
siliconchip.com.au
Untrimmed Error
Vout (mV)
Absolute (mV)
Trimmed Error
Relative Absolute (mV)
Relative
0.000
0.233
0.23
0.01%
0.48
0.019%
99.726
256.654
0.36
0.01%
-0.19
-0.007%
199.824
514.948
1.40
0.05%
0.05
0.002%
299.980
772.739
1.79
0.07%
-0.36
-0.014%
400.008
1031.164
3.14
0.12%
0.19
0.008%
499.980
1289.040
4.09
0.16%
0.34
0.013%
600.007
1546.980
4.96
0.19%
0.41
0.016%
699.965
1804.750
5.84
0.23%
0.49
0.019%
800.024
2062.770
6.71
0.26%
0.56
0.022%
899.971
2320.490
7.56
0.29%
0.61
0.024%
999.866
2578.110
8.45
0.33%
0.70
0.027%
Table 3 – untrimmed measured results from the INA821 circuit shown in Fig.8.
Measured Data
Untrimmed Error
Trimmed Error
I (mA)
Vout (mV)
Absolute (mV)
Relative Absolute (mV)
Relative
0.000
1.614
1.61
0.06%
0.46
0.018%
99.759
258.745
2.37
0.09%
0.14
0.005%
199.898
517.182
3.44
0.13%
0.14
0.005%
299.829
775.181
4.62
0.18%
0.24
0.009%
400.044
1033.716
5.60
0.22%
0.15
0.006%
500.013
1291.840
6.81
0.26%
0.28
0.011%
600.390
1549.970
6.97
0.27%
-0.64
-0.025%
700.009
1807.980
8.96
0.35%
0.28
0.011%
800.060
2066.110
9.96
0.39%
0.20
0.008%
899.975
2323.980
11.04
0.43%
0.21
0.008%
999.872
2581.780
12.11
0.47%
0.20
0.008%
Table 4 – untrimmed measured results from the INA821 circuit shown in Fig.8
when replaced with an LT1167A.
We have shown that with the shunt
in the positive supply, we can probably achieve a trimmed accuracy of
around 0.03% at 25°C with an additional 0.15% error over the 0–50°C
temperature range if we use the
INA821 instrumentation amplifier and
dynamic offset correction. Let’s call
this 0.2% of total error.
This suggests we will have an overall resolution of ±2mA in our 1A current (ignoring ADC precision for now).
That is not good enough to measure
the microamp resolution we would
like to achieve.
I hope it is clear by now that we
are not going to get the required three
orders of magnitude improvement in
precision just by improving the signal conditioning circuit. Even if we
could, we will run into ADC quantisation limits, which we will cover in
a later article.
Australia's electronics magazine
The current circuit needs an ADC
with at least 10 effective bits of resolution – three more orders of magnitude
would require over 33 bits of effective
resolution, which is pushing the limits of what is possible!
There is another way. We could
pretty easily scale the range of the circuit by using a different shunt resistor. For example, using a 10W resistor
would give a range of 0 to 10mA with
±20µA resolution, while a 1kW resistor would yield a range of 100µA fullscale with ±200nA resolution.
That will require some additional
circuitry to switch the ranges. This,
and the dynamic offset zeroing, will
require us to add some switching elements to our signal path, which will
themselves introduce some imprecision. We will look more deeply into
signal switching in the next instalment
of this series.
SC
January 2025 47
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