Silicon ChipCircuit Surgery - April 2024 SILICON CHIP
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This is only a preview of the April 2024 issue of Practical Electronics.

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  • From nano to bio (May 2022)
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  • Mixed menu (July 2022)
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  • What’s in a name? (September 2022)
  • Forget leaves on the line! (October 2022)
  • Giant Boost for Batteries (December 2022)
  • Raudive Voices Revisited (January 2023)
  • A thousand words (February 2023)
  • It’s handover time (March 2023)
  • AI, Robots, Horticulture and Agriculture (April 2023)
  • Prophecy can be perplexing (May 2023)
  • Technology comes in different shapes and sizes (June 2023)
  • AI and robots – what could possibly go wrong? (July 2023)
  • How long until we’re all out of work? (August 2023)
  • We both have truths, are mine the same as yours? (September 2023)
  • Holy Spheres, Batman! (October 2023)
  • Where’s my pneumatic car? (November 2023)
  • Good grief! (December 2023)
  • Cheeky chiplets (January 2024)
  • Cheeky chiplets (February 2024)
  • The Wibbly-Wobbly World of Quantum (March 2024)
  • Techno Talk - Wait! What? Really? (April 2024)
  • Techno Talk - One step closer to a dystopian abyss? (May 2024)
  • Techno Talk - Program that! (June 2024)
  • Techno Talk (July 2024)
  • Techno Talk - That makes so much sense! (August 2024)
  • Techno Talk - I don’t want to be a Norbert... (September 2024)
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Articles in this series:
  • Win a Microchip Explorer 8 Development Kit (April 2024)
  • Net Work (May 2024)
  • Net Work (June 2024)
  • Net Work (July 2024)
  • Net Work (August 2024)
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  • Net Work (April 2025)
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  • Teach-In 2024 (April 2024)
  • Teach-In 2024 (May 2024)
  • Teach-In 2024 – Learn electronics with the ESP32 (June 2024)
  • Teach-In 2024 – Learn electronics with the ESP32 (July 2024)
  • Teach-In 2024 – Learn electronics with the ESP32 (August 2024)
  • Teach-In 2024 – Learn electronics with the ESP32 (September 2024)
  • Teach-In 2024 – Learn electronics with the ESP32 (October 2024)
  • Teach-In 2024 – Learn electronics with the ESP32 (November 2024)
Articles in this series:
  • Circuit Surgery (April 2024)
  • STEWART OF READING (April 2024)
  • Circuit Surgery (May 2024)
  • Circuit Surgery (June 2024)
  • Circuit Surgery (July 2024)
  • Circuit Surgery (August 2024)
  • Circuit Surgery (September 2024)
  • Circuit Surgery (October 2024)
  • Circuit Surgery (November 2024)
  • Circuit Surgery (December 2024)
  • Circuit Surgery (January 2025)
  • Circuit Surgery (February 2025)
  • Circuit Surgery (March 2025)
  • Circuit Surgery (April 2025)
  • Circuit Surgery (May 2025)
  • Circuit Surgery (June 2025)
Articles in this series:
  • Max’s Cool Beans (April 2024)
  • Max’s Cool Beans (May 2024)
  • Max’s Cool Beans (June 2024)
  • Max’s Cool Beans (July 2024)
  • Max’s Cool Beans (August 2024)
  • Max’s Cool Beans (September 2024)
  • Max’s Cool Beans (October 2024)
  • Max’s Cool Beans (November 2024)
  • Max’s Cool Beans (December 2024)
Articles in this series:
  • Audio Out (January 2024)
  • Audio Out (February 2024)
  • AUDIO OUT (April 2024)
  • Audio Out (May 2024)
  • Audio Out (June 2024)
  • Audio Out (July 2024)
  • Audio Out (August 2024)
  • Audio Out (September 2024)
  • Audio Out (October 2024)
  • Audio Out (March 2025)
  • Audio Out (April 2025)
  • Audio Out (May 2025)
  • Audio Out (June 2025)
Articles in this series:
  • Circuit Surgery (April 2024)
  • STEWART OF READING (April 2024)
  • Circuit Surgery (May 2024)
  • Circuit Surgery (June 2024)
  • Circuit Surgery (July 2024)
  • Circuit Surgery (August 2024)
  • Circuit Surgery (September 2024)
  • Circuit Surgery (October 2024)
  • Circuit Surgery (November 2024)
  • Circuit Surgery (December 2024)
  • Circuit Surgery (January 2025)
  • Circuit Surgery (February 2025)
  • Circuit Surgery (March 2025)
  • Circuit Surgery (April 2025)
  • Circuit Surgery (May 2025)
  • Circuit Surgery (June 2025)
Circuit Surgery Regular clinic by Ian Bell LTspice 24 and Frequency Response Analysis – Part 2 L ast month, we started looking at the frequency response analysis (FRA) function in LTspice, which was part of a major update from LTspice XVII (17.0) to LTspice 17.1. Since then, there has been another major update with a new version number: LTspice 24. Although our main focus in these articles is the FRA, like last month, we will start by looking at some of the changes in this release. User interface changes Unlike the LTspice 17.1 update, in the move to LTspice 24 there is a very obvious visual difference, as icons and cursors have been updated (see Fig.1 and Fig.2 which show the old and new toolbars respectively). The default background has also changed. The new toolbar contains more or less the same functions, but the order has changed to some extent, and there are some items which have been added or removed. For example, the ‘Close All’ windows button has gone, but there are now both ‘Tile Horizontally’ and ‘Tile Vertically’ buttons, previously there was just a button to tile windows horizontally. There is a new ‘Configure Analysis’ button (to set up the simulation). Some functions have been renamed: ‘Control Panel’ is now the more conventional ‘Settings’, and schematic editing ‘Drag’ mode is now called ‘Stretch’. This is where components are moved without breaking the wiring connections, which is useful for adjusting the layout of a schematic. The general aim of these changes seems to be to update to more modern conventions in function naming and icon style. Some default keyboard short cuts have changed; for example, schematic editing duplicate mode was F6 and is now Ctrl+C. There is a new ‘Keyboards Shortcut Cheat Sheet’ window which can be opened as a reference for the shortcuts. This is a non-modal window, so you can keep it open Circuit closed-loop gain Amplifier open-loop gain AC = So / Sinp for reference as you work. AC = So / Sai It is possible to revert to Sinp Sinp Sai So So Ao 1 the old (‘LTspice Classic’) + − shortcuts via the edit Loop gain Sf –βAo = S' f / Sf shortcuts function that is available from this window Break in loop to – useful if the old ones are define loop gain too ingrained and you don’t S' f β want to relearn! So In the old LTspice, the simulation configuration Fig.3. Structure of an amplifier with negative feedback w i n d o w ( w h i c h w a s showing the open-loop (red), closed-loop (green) and called ‘Edit Simulation loop-gain (blue) relationships. Command’, and is now called ‘Configure Analysis’) would forget Frequency response details of commented-out simulation analysis recap directives. Now, if there is appropriate text LTspice’s frequency response analysis on the schematic, the relevant parameters (FRA) is aimed at determining the will be shown in the appropriate tab in stability of negative feedback circuits; the simulation configuration window that is, finding out how much margin when it is opened. Also, using shift- of error there is between stable and click, it is now possible to toggle text unstable operation. The LTspice FRA on the schematic between being a SPICE is optimised for use with switch-mode directive (such as a simulation command) powers supplies (SMPS) but it can be and a comment (which LTspice will not used with other feedback circuits. To act on as a command). This is very useful introduce the basic concept and use of if you have a few simulation commands the FRA, last month we started looking set (eg, for transient and AC analysis) as it at applying the FRA to simple op amp provides a quick way to switch between circuits rather than dealing with the them. You can tell these apart in the complexities of an SMPS. default colour scheme – directives are Last month, we covered some basics of black, and comments are blue. feedback analysis of op amp amplifiers The are some useful changes to the (see Fig.3, which shows a system diagram waveform viewer. Plot panes can now of a noninverting op amp amplifier). be moved around and reordered more Key concepts are open-loop gain (the easily using move up/down functions gain of the op amp with no feedback from the right click menu. All cursors applied, AO) the fraction of signal fed can be removed using the Esc key, and back (b), closed-loop gain (the gain of gain and phase margin annotation can the circuit with feedback, AC) and loop be added where applicable. The help gain. Loop gain is the gain around the system has also changed and now loads feedback loop (−bAO) and is an important pages via a browser. The Help menu parameter when considering the stability has been expanded and includes Open of feedback systems. Examples, which provides quick access to Measuring loop gain for a real the examples included in the download. circuit, and in simulation, is tricky as it (Above) Fig.1. Old LTspice Toolbar; (Below) Fig.2. Updated toolbar in LTspice 24. 50 Practical Electronics | April | 2024 Phase margin Phase shift Gain (dB) function. Fortunately, a number of techniques have been developed to help overcome this problem, including the Middlebrook method 0 (published in the Gain paper ‘Measurement of margin Loop Gain in Feedback Log frequency Systems’, in the 0 180 International Journal of Electronics in 1975), which is implemented –90 90 by LTspice in its FRA. The result of the Phase LTspice FRA is a plot margin of loop gain and phase –180 0 against frequency and Fig.4. Loop gain plot showing gain margin and phase margin. The reported values for phase axis can be labelled with either phase shift or phase margin. gain margin and phase margin. These indicate how much additional gain at 180° phase potentially involves ‘breaking the loop’, shift, and how much additional phase which may profoundly affect a circuit’s Fig.5. Example FRA results from last month using LTspice 17.1. shift at gain 1 (0dB) would be needed to cause instability (see last month for details). These values indicate how stable the circuit is likely to be in operation. FRA updates in LTspice 24 Gain and phase margin are shown graphically in Fig.4. The loop phase can be plotted simply as phase shift (as it would be in an AC analysis) or it can be shown as phase margin by setting the axis scale values to phase shift + 180°, which makes it easier to read the phase margin (at the 0dB frequency). This change in axis labelling has been made in the FRA in LTspice 24, which now plots phase margin rather than phase shift. This can be seen in Fig.5 and Fig.6 which show the example FRA plot from last month (with LTspice 17.1) and the results from the same simulation run in LTspice 24. Also, when this example was run in LTspice 24 it did not automatically add text giving both the phase and gain margins (as seen in Fig.5), it just showed F(0dB) and the phase margin, however, gain and phase margin annotations can be added manually by using the right-click menu on the waveform plot and selecting ‘Notes & Annotations’ and then ‘Annotate Gain Margin’ (or phase margin). These added annotations are included in Fig.6. As explained last month, running an FRA requires an FRA component to be added to the schematic, specifically inserting it into the feedback loop. Other enhancements to the FRA in version 24 include a new 4-terminal probe (schematic component) which can be used in some situations where the FRA analysis was difficult to implement with just the FRA component. Analogue Device’s release notes also say that the stimulus generated to run the FRA has been improved to provide better accuracy – it now has smoother changes between waveforms as frequency is changed. Transient analysis frequency response Fig.6. FRA results from the example from last month using LTspice 24 with phase and gain margin annotations added. Note the phase margin scale on the phase axis. Practical Electronics | April | 2024 LTspice users and regular readers of Circuit Surgery will be familiar with plots of gain and phase against frequency obtained using AC analysis. FRA plots looks similar to AC analysis results; however, the simulation is performed in a fundamentally different way. The setup required for a transient-based analysis is more complex than for AC analysis, so we’ll discuss the issues involved before describing the FRA settings in LTspice. AC analysis uses a linearised model of the circuit, from which LTspice can rapidly calculate the response at any frequency. Strictly speaking, AC analysis only works for very small input amplitudes (AC analysis is also called 51 Fig.7. LTspice for investigating FRA with a simple op amp amplifier. Fig.8. AC analysis results (closed-loop circuit and op amp open loop) from the Fig.7 circuit. ‘small-signal analysis’). The model used only applies to a particular operating point (the DC conditions, or bias, in the circuit). Large signals will shift things too far from this point, invalidating the model parameters. For example, the gain of an amplifier will decrease at high input levels as it starts to clip. However, once created, the linearised model gives the same gain vs frequency result for any amplitude input. Therefore, it is common to use a 1V input from AC analysis in LTspice even if the real circuit would not work correctly with this signal level. With an input of 1 the output is numerically equal to gain and therefore the gain is easy to plot – you just plot the signal value (voltage); you don’t have to calculate the gain as v(out)/v(in). LTspice’s FRA is aimed at stability analysis of SMPSs, which are nonlinear circuits with no small-signal linear equivalent circuit that could be used for AC analysis. However, there is an alternative to AC analysis, which is to directly measure the gain and phase shift with a range of sinewave stimuli, using transient simulation (time-based simulation to obtain circuit waveforms). This is the approach used in LTspice’s FRA. 52 Transient simulation corresponds with what would be done with a real circuit in the lab to obtain a frequency response – typically using a signal generator and oscilloscope, often using automated measurements to cover the many different frequencies required to calculate gain and phase shift. This is straightforward for a simple input to output response, but as discussed last month, measuring loop gain requires special techniques such as those published by Middlebrook. The Middlebrook approach was developed for use in the lab but can also be implemented using transient simulation. The LTspice FRA runs a transient simulation in which it injects signals into the feedback loop and analyses the response in accordance with a version of Middlebrook’s method. Setting up an LTspice FRA Setting up an AC analysis for input to output gain is straightforward – it just requires the input amplitude (usually 1, as noted above) from a standard source at the circuit input, and the required frequency range and number of points for the plot to be produced. For a transient simulation-based frequency response there is more to think about. Signal amplitudes must be suitable – too high and the circuit will be forced outside its normal operating conditions, for example clipping, or slew rate limiting in the case of an amplifier – too low and the output / response signal may be difficult to measure / resolve due to noise (in the lab) or accuracy limitations (in simulation). Because gain changes with frequency (the whole point of performing a frequency response analysis) the suitable signal levels may also change with frequency. Also, when the frequency is changed during the analysis run any resulting abrupt changes in the input / injected waveform may cause responses such as spikes that could temporarily invalidate the analysis. Therefore, it may be necessary to wait for the circuit to stabilise after each frequency step. Furthermore, the circuit may take time to settle to normal operation at start up, so an initial delay before analysis starts may be required. For the specific case of loop-gain analysis, it is also necessary to decide where in the loop the signal will be injected. In the case of LTspice this involves adding an FRA component to the schematic (this has name prefix ‘<at>’). The analyser component applies the sinusoidal stimuli and measures the response. To reduce simulation time, it may optionally simultaneously inject multiple harmonics, although this may reduce accuracy. The LTspice FRA uses the voltageonly version of Middlebrook’s method, which requires the device to be inserted into a point where a low impedance is driving a high impedance. For an op amp amplifier, the op amp output and feedback resistor should be suitable. For an SMPS, the FRA component would usually be placed between the power supply output and error amplifier input. The FRA must interrupt all paths in the loop – that is, there must not be a parallel path in the loop which bypasses the FRA component. Example circuit The circuit in Fig.7 will be used to look at basic use of the LTspice FRA and relate the results to the op amp theory we discussed last month. The circuit Introduction to LTspice Want to learn the basics of LTspice? Ian Bell wrote an excellent series of Circuit Surgery articles to get you up and running, see PE October 2018 to January 2019, and July/August 2020. All issues are available in print and PDF from the PE website: https://bit.ly/pe-backissues Practical Electronics | April | 2024 Fig.9. FRA setup for trial run. uses an idealised op amp (LTspice UniversalOpAmp2, and is a basic noninverting amplifier with a gain of 10 (20dB) (1+R1/R2 = 1 + (90kΩ /10kΩ) = 10). The FRA component (<at>1) is inserted between the op amp U1 output (lowimpedance op amp output) and feedback resistor (relatively high impedance since 90kΩ is used) to fit the requirements for FRA insertion. The schematic has three analyses configured on it (FRA, AC and transient). The LTspice 24 update means it is now easy to switch between these using Shift-Click, which toggles between SPICE directive (black text) and comment (blue text). Op amp U2 is the same as U1 and is included to provide an open-loop AC analysis. This is done in a crude way here – simply applying the input to the open-loop amplifier. This works for this idealised device in simulation, but for real devices (particularly in the lab) more sophisticated approaches would be needed; for example, to ensure that the device is DC stable and does not saturate. Fig.8 shows the results of running the AC analysis with the FRA device deactivated. It is helpful to understand this before looking at the FRA results. The idealised model for U1 is configured to have an open-loop gain of one million (120dB). This value can be changed by right-clicking the op amp symbol (Avol parameter). We see the 120dB gain on the open-loop plot (red trace) at low frequencies, but the gain starts reducing above about 1Hz. Specifically, Practical Electronics | April | 2024 it is down by 3dB (half power) at 10Hz. This is typical of real op amps. Op amp open-loop gain reduction with increasing frequency is called compensation, and is deliberately designed into the device to help ensure stability when feedback is applied. The frequency at which the gain reduces by 3dB is set by the gain-bandwidth product parameter (G B W ) in the op amp model, which in this case is 107 (10 million). On the sloped part of the open-loop response the product of gain and frequency is 107 at all points (eg, 60dB (gain 1000) x 10kHz = 10 7 and 0dB (gain 1) x 10MHz = 107). The closed-loop gain (AC) is 10 (20dB), as noted above, and we see this gain is maintained for the amplifier circuit until around 1MHz (where it is 3dB down) – we can predict this from the gain-bandwidth product by dividing by the closed-loop gain. The closed-loop bandwidth is GBW/ AC = 1.0 x 107/10 = 1MHz. Last month, we saw that the closedloop gain equation for a non-inverting op amp amplifier could be simplified by approximating the term (1 + bAO) to bAO. This gives the closed-loop gain just in terms of b, which leads to the well-known gain formulae for op amp amplifiers that only depend on the feedback resistors, not on the openloop gain. A naive interpretation of the gain formula 1+R1/R2 would imply the same gain at all frequencies. However, this is not the case because it depends on the assumption of high open-loop gain (or more accurately loop gain). The approximation breaks down at high frequencies as the open-loop gain (bAO) reduces and is no longer much greater than one. Preparing for FRA FRA uses transient simulation, so it is important make sure the transient simulation is running correctly before starting FRA. For our example op amp circuit, which is close to ideal, this is straightforward, but may be less so for more complex circuits such an SMPS. This simulation should be used to determine the time the circuit takes to settle to normal operation (and other parameters for an SMPS). If the delay is significant, it should be reduced if possible, or steps taken to speed up the simulation. For the op amp circuit, correct operation can be confirmed by using a sinewave input from source V1, but if this is done the source function should be changed from sine to none before the FRA is run to prevent the signal from interfering with the FRA later. If not already in place, the FRA component should be added to the schematic at a suitable point in the feedback loop. If it is in place already then it needs to be disabled during the standard transient simulation. Full FRA simulations can be quite long, so it is a good idea to start with a trial run that uses a very small number of frequencies to check it is operating correctly. The main setup for the FRA analysis is done via the FRA device right-click menu, rather than through the more usual use of the Analysis Configuration dialogue. FRA device configuration and trial run Fig.9 shows the setup dialog for the FRA device configured for a trial run for the circuit in Fig.7. There are a lot of parameters which can be set for the FRA. We will discuss the parameters used for the initial run now, and comment on others later. The FRA can perform gain or impedance vs frequency analysis – we are looking at gain, so this is selected. The start and end frequencies are obvious parameters, but their required values depend on the properties and specification of the circuit being analysed. For a trial run these should be fairly close together to keep the number of frequencies analysed small. The number of frequencies is also controlled by the points per octave drop-down. A low setting (0.5) should be used for trial runs. More points give a more detailed graph but will take longer. As noted above, the stimulus amplitude must be suitable for the circuit and may need to vary with frequency. The FRA setup allows you to define two frequency corners (F0 and F1) at which the peak-to-peak signal voltages are defined: pp0 (low-frequency amplitude) and pp1 (high-frequency amplitude) respectively. The amplitude is pp0 below F0 and pp1 above F1 and varies from pp0 to pp1 between F0 and F1. This is the amplitude at the point where the FRA is inserted, which in this case is the op amp output. As the gain of the amplifier is higher at lower frequencies we would typically expect higher amplitudes at low frequencies, but the specific values used here were mainly set for purposes of illustration. The General section of the dialog contains timing parameters. The start analysis time controls when the first stimulus is applied and should provide enough time for the circuit to settle after the start of the simulation. This is important for circuits such as an SMPS, but the value used here is for illustration rather than being necessary for analysis of the op amp circuit. The minimum analysis time sets the minimum time for applying each frequency. Analysis starts after the settling time – which can 53 Fig.10. Stimulus waveform for FRA trial run using settings shown in Fig.9. Fig.12. FRA setup for full run. Fig.11. FRA plot for the circuit in Fig.7 using settings shown in Fig.9. be adjusted appropriately if behaviours such as spikes and ripples are observed in the waveforms when the stimulus frequency changes. These parameters are not particularly critical for the op amp example, but for circuits such as an SMPS the values should ensure that sufficient switching cycles are included without being so long as to cause excessive run time. The General section also contains a checkbox for disabling the FRA device – this should be used when other types of analysis are run. The stimulus waveform for running the FRA for the circuit in Fig.7 with settings in Fig.9 is shown in Fig.10. The frequency response plot is shown in Fig.11. FRA waveforms are plotted in the same way as a normal transient simulation and the response plot window appears automatically after the simulation completes. Three frequencies were used: 1kHz, 4kHz and 10kHz. Ideally, the response plot would include the 0dB gain frequency, but here the values are just to produce illustrative waveforms. The waveform plot shows the 0.5ms delay before the stimulus is applied; the 50mV high-frequency amplitude (at 10kHz); the 100mV lowfrequency amplitude (at 1kHz); and an intermediate amplitude at the frequency between these – corresponding with the setting shown in Fig.9. The waveforms look OK (there is no distortion) which indicates that the parameters are suitable for a full analysis. Simulation files Fig.13. FRA plot for the circuit in Fig.1 using settings shown in Fig.12. 54 Most, but not every month, LTSpice is used to support descriptions and analysis in Circuit Surgery. The examples and files are available for download from the PE website: https://bit.ly/pe-downloads Practical Electronics | April | 2024 Full FRA analysis For readers interested in investigating the FRA further, particularly for SMSP circuits, there are additional details The setting used for a full analysis are shown in Fig.12 and the available via the LTspice help, and SMPS FRA examples results in Fig.13. The frequency range has been increased to are provided with the LTspice 24 download. cover a wider range, similar to that in Fig.8, with more points per octave than the trial run. The range goes up to 10MHz with an additional specific frequency of 100MHz, which extends the range plotted without requiring many more waveform steps. The datapoints are marked on Fig.13, which shows the six or seven points per decade stopping at 10MHz, and the single additional point at 100MHz. Furthermore, the coarse stepping parameter is set to 100Hz, which reduces the number of frequency steps per octave below the specified frequency. These last two parameters are not really needed here but are included to illustrate their use. They can help reduce simulation time. For an SMPS, the simulation time may be long at low frequencies because many switching cycles are required for just one cycle of the stimulus. Simulation time can also be reduced by setting the number of simultaneous All 60 issues from Jan 2017 harmonics (typically 2 to 4). This applies multiple frequencies to Dec 2021 for just £44.95 at the same time – it is faster, but less accurate. Comparing the results in Fig.13 with Fig.8 we see that the PDF files ready for loop gain (bAO) is equal to the difference (on the dB scale) LTspice 24 and Frequency Response Analysis Part 2 the loop between the openand closed-loop gains,–while immediate download gain is much larger than 1. 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