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SOFTWARE: Logic array design Vantis Synario Starter Software Fancy designing a project which incorporates a program­mable logic device? Now you can do it at low cost with this new kit from Vantis. It contains sample PLDs, all the software on CDROM & can be implemented on a standard PC. By RICK WALTERS Over the last 10 years or so, many new programmable IC devices have been released which have been incorporated into electronic equipment without much fanfare. They were initially available as PLAs which is the acronym for Programmable Logic Arrays. PLAs were an IC which consisted of a programmable array of logic AND gates followed by a pro12  Silicon Chip grammable OR array, which could be programmed by the manufacturers of many types of elec­tronic equipment, to perform a specific function. This was done by fusing (melting) various links inside the device to obtain the required result. PLAs were followed by PALs which had a fixed OR structure and programmable AND devices. Although this made them slightly less flexible than the PLA they were cheaper and faster. PALs gradually evolved into SPLDs (simple programmable logic devices), and FPLAs (field programmable logic arrays), which are re-programmable, while the fused link types were not. Now we have CPLDs, which instead of being simple, are com­plex. All these latter devices are similar to EEPROMs (electri­cally erasable programmable read only memory) in that they can be erased and reprogrammed in a test jig. The latest CPLDs from Vantis are designated ISP, which stands for “in system programmable”. The advantages of PLDs for a designer or manufacturer of modern electronic equipment are many. These include their small size and high packaging density which allows a lot of functions to be crammed into one chip. They also give excellent protection from unauthorised copying of the product and they can often reduce inventory because one type of PLD may be programmed to provide a whole range of circuit functions in different products in a manufacturer’s range. What has created all this interest in PLDs? To find out, we recently took a look at the Vantis MACH starter kit, which consists of a CD-ROM, a programming kit which includes two devices and a print­ed ISP manual. The CD-ROM runs under Windows 95 or Windows NT4.0 and contains all the programming software, the data sheets for all MACH (macro array CMOS high density) devices and a copy of the MACH ISP manual. The programming kit consists of a small PC board with a 44-pin zero insertion force (ZIF) socket and a 2-metre cable which connects to the parallel port of a PC. This lets you program either of the supplied devices, which are a MACH111SP-5JC and a MACH211SP-7JC, to come to grips with the concept. The 111SP-5 is a 44-pin PLCC device containing 32 macro­cells (1250 PLD gates) with 32 I/O pins, two dedicated inputs and eight output en­ables. It can operate at up 167MHz and draws 40mA. The 211SP-7 has 44 pins, 64 macro­ cells (2500 gates), similar I/O pinouts and operates at up to 133MHz, drawing a similar current. Naturally the kit is capable of programming other devices in the Vantis range, as well as these two. Fig.1: here, the source is listed as “test”, while the virtual device is listed as flipflop (Flipflop.sch). a simple example of how to create a project. Creating the schematic We obviously needed a circuit for our project which we’ll called “test” – highly original we admit but you’ve got to start somewhere. To keep it simple, we decided on a clocked flipflop made from a few gates and we named it “flipflop”. Fig.1 shows this progress, with the source listed as “test” and the virtual device as a flipflop (flipflop.sch). The next step would seem to be to draw the flipflop circuit. Clicking on Window brings up a list of editors. We chose schematic and the window of Fig.2, without the symbol libraries or circuit appeared. A description of the drawing symbols is shown in a separate panel. Clicking on the gate symbol brought up the symbol libraries window. From the top we selected the gates library and then scrolled down until we found a 2-input AND gate. Two of these were placed, then an OR gate, and these The software The software requires a Pentium PC or equivalent with 16Mb of memory and is loaded in the normal manner. Adequate instructions are given inside the CD cover and we had no trouble loading it into one of our machines. Once you click on the Vantis icon a window opens. It is titled Vantis Synario software project navigator, with the in­ struction: “select new project or open project”. Naturally we selected a new one as we didn’t have any existing projects saved. At this stage, you feel the need for an on-screen tutorial or a at least few pages of text to take you through This close-up view shows the programming board which carries the 44-pin PLCC socket. It is connected via a cable to a PC’s parallel port. June 1998  13 Fig.2: the next step is to draw the circuit in the Schematic Editor. The Symbol Libraries dialog box lets you select devices and place them on the schematic. were connected by select­ing the line symbol. As you can see from Fig.2 we have just placed an inverter. Once the layout is completed and the I/O lines (inputs and outputs) labelled, the file is saved and the window closed. We Fig.3: this dialog box shows the processes that are available when the flipflop device is selected. 14  Silicon Chip are then returned to the screen of Fig.1. Fig.3 shows the processes available when we click on flipflop, while Fig.4 shows those available when Virtual Device is selected. Double-clicking on flipflop will take you straight into that schematic in the editor. This would be handy if you were drawing a large circuit over several sessions, as the project you were last working on is presented each time the Vantis software is loaded. Once your circuit is finalised, the schematic has to be compiled. If this step is successful you move on to reducing the schematic logic. If there are problems with the compilation then error messages are generated and logged. When all is well with the circuit you click virtual device, then update all schematic files. This is necessary as a large device can consist of several, or indeed many, pages of circuits. The main page may only be a block diagram of a concept, with each sub-circuit representing one block, or maybe only part of a block (top down hierarchy). SILICON CHIP If you are seeing a blank page here, it is more than likely that it contained advertising which is now out of date and the advertiser has requested that the page be removed to prevent misunderstandings. The advertiser, BBS Electronics, is no longer in business. June 1998  15 that when the dot on the IC faces towards P2 you can push it down into the socket. Pushing the socket down ejects the chip. The MACHPRO software has to be separately installed from the CD into its own directory on the C: drive. The readme.txt file in the MACHPRO subdirectory on the CD gives full instructions on how to set it up for Windows 95 or NT4.0 and which files have to be copied and unzipped. This is the time to read chapter 3 and appendix B of the Mach ISP manual. These gives a good insight into the steps you must now take. Once read, from Start – Programs – MACHPRO for WIN, run MACHJTAG-ISP TOOL. This opens a window entitled JTAG chain editor and MACH programmer. Clicking on the file menu brings up two chain files which are demonstration programs and selecting Chain1 brings up the screen shown in Fig.5. If project is selected, one of the options available is to program the device. Fig.4: different processes are available when Virtual Device is selected. Summing up Fig.5: two demonstration programs are included with the software: Chain1.wch and Chain2.wch Vantis assigns and labels interconnections between all the blocks and if one block or circuit is altered it can effect the interconnections right through them all. The last step is to combine all the individual blocks into one larger logic block. You can specify the particular device you wish to use or let the software tell you the device type it can fit everything in. Programming the device Now comes the relatively easy part – actually programming the chip. One of the photos (on page 13) shows the programming board with the 44-pin PLCC socket and the cable which connects it to the compu­ter’s parallel 16  Silicon Chip port. A +5V supply is needed and this can be obtained from a separate power supply or from the computer’s games port on pin 1. Surprisingly, the socket has no indication of which way the IC fits into it. On the fourth try we found Drawing Symbol Table Symbol Instance Name Pin Attrib Wire Net Name Net Name I/O Pin Symbol Attrib Net Attrib Duplicate Move Drag - - Delete Text Li ne Rectangle Arc Circle Highlight Net While the time available did not allow us to program a device to match a complex circuit function, we saw enough of the program and the comprehensive literature on the CD-ROM to get some feel for its capabilities. Inevitably though, just as with any other complex software package, there will be a steep learn­ing curve for anyone diving in at the deep end. The lack of a tutorial for beginners, either printed or on the CD, is a little disappointing though and would make the initial hurdles a lot easier. To really come to grips with the program, you will have to plough through the 347-page manual and print out the bits that you need, so that you can refer to them until you become more familiar with the software. Having said that, the Vantis Mach Starter Kit will be a good investment for any designer who is not yet into using these devices. The keen price of the development kit and the reasonable cost of the devices won’t place much of a burden on the bank balance. The Mach Starter Kit costs $89 and is available from BBS Electronics Australia Pty Ltd, PO Box 6686, Baulkham Hills, NSW 2153. Phone (02) 9894 5244; fax (02) 9894 5266; or email to SC bbsaust<at>bbsaust.com.au.