Table 1.1: Key data for the 2N7000
Specification
Abbrev.
Value
Maximum drain-source voltage
VDS(max)
60V
Maximum drain-gate voltage
VDG(max)
60V
Maximum gate-source voltage
VGS(max)
±20V
Maximum drain current
ID(max)
200mA
Maximum total power dissipation
PD(max)
350mW
Maximum gate-source threshold voltage
VGS(th.max)
0.8V
Minimum gate-source threshold voltage
VGS(th.min)
3V
Minimum forward transconductance
gfs
0.1mS
Maximum input capacitance
Ciss
60pF
The transfer characteristics (shown in
Fig.1.5) provide us with another family of
plots. They show how the drain current
(ID) varies with gate-source voltage (VGS)
for different values of drain-source
voltage (VDS). The three curves shown
correspond to VDS values of 3V, 6V and
11V. As can be seen, they are all very
similar. It is worth noting that we have
plotted these curves using relatively
small values of drain current (ID) and,
as with the output characteristic curves
shown in Fig.1.4, the values of drain
current are very much less than those
shown in the data sheets published by
semiconductor manufacturers.
The slope of the transfer characteristic
is of particular significance. This
is known as the forward transfer
conductance (gfs) and is defined as a small
change in drain current ( ID) divided by
the corresponding small change in gatesource voltage, ( VGS) at a given value of
drain-source voltage (VDS), thus:
The value of gfs is quoted using the unit
of conductance (siemen (S), or even ‘mho’
(which is simply ‘ohm’ backwards!) by
some manufacturers). However, since
the values are usually fairly small, we
use mS (milli-siemen) or mmho instead.
Putting this into the context of
Fig.1.4, a change in drain current from
6mA to 10.9mA will be produced by
a change in gate-source voltage from
ΔID
2.3V
gfs =to 2.4V.SHence, at this point on the
GS
transferΔV
characteristic
when VDS = 6V,
we can determine the forward transfer
conductance from:
gfs =
ΔID
S
ΔVGS
gfs =
(11 - 6.0 ) mA = 5mA = 50 mS
( 2.4 - 2.3) V 0.1V
gfs =
(11 - 6.0 ) mA = 5mA = 50 mS
( 2.4 - 2.3) V 0.1V
Using MOSFET devices in linear
applications
As previously mentioned, Fig.1.6 shows
the basic components that are used
in a simple common-source MOSFET
amplifier stage.
In order to use a 2N7000 in linear
mode it is necessary to provide a gatesource bias voltage of around 2V. The
gate bias (Vbias) can be applied to the
Fig.1.5 Transfer characteristics for a 2N7000 operating under
small-signal conditions.
Practical Electronics | January | 2021
Fig.1.6. Bias and load arrangements
for a simple common-source MOSFET
amplifier stage.
gate via a high-value resistor, RB. The
value of RB is not critical but is usually
in the range 100kΩ to 1MΩ. The output
voltage is developed across a load resistor
(RL) of suitable value connected in the
drain circuit. Capacitors CIN and COUT
(respectively) are used to couple the AC
signal into and out of the stage.
Load lines
To understand how the load resistor
works it is worth taking a look at
Fig.1.7 which shows how a load line
can be superimposed on the output
characteristics that we met earlier.
This particular load line corresponds
to a value of 500Ω for RL. The two
ends of the load line correspond to the
extreme values that would occur when
TR1 is either fully conducting (on) or
non-conducting (off). The slope of the
load line is thus the inverse of RL. The
operating point is the point at which
corresponding values of VDS and ID will
occur when no signal is applied (this is
sometimes referred to as the ‘quiescent
condition’). When a signal is applied
to the stage, VGS will change and the
Fig.1.7. Load line superimposed on the 2N7000 output
characteristics.
39
Fig.1.8. A basic amplifier using the 2N7000.
Fig.1.10. An improved ‘gain block’.
half the supply
voltage (ie, around
4.5V neglecting
the small voltage
dropped across
R4). Typical operating voltages are
shown on Fig.1.8,
but in practice, and
due to variations
in the characteristics of individual
components and
MOSFET devicFig.1.9. An amplifier stage with a gain of about 40.
es, variations of
around ±10% can
be expected. If significant differences are
operating point will move up and down
encountered, then the values of R1 and/
the load line. It is then possible to read
or R2 can be changed accordingly.
off corresponding values of VDS and use
The voltage gain of the stage is
them to infer the shape of the output
approximately 14. This means that a
voltage waveform, as shown in Fig.1.7.
signal input of 100mVpk-pk will result
With the conditions indicated on
Fig.1.7, if a 300mV pk-pk signal is
in an output of 1.4Vpk-pk. If more gain
superimposed on a standing bias voltage
is required then a capacitor can be
of 2.35V, the value of drain-source voltage
introduced in parallel with R4, as shown
(VDS) will swing down to a minimum of
in Fig.1.9. This capacitor will bypass the
signal voltage component that appears
3.2V and up to a maximum of 8.2V. Hence
across R4, reducing the amount of negative
an input of 350mVpk-pk will produce an
feedback and increasing the voltage gain
output of 5Vpk-pk corresponding to a
as a result. With R4 bypassed to signals,
modest voltage gain (AV) of a little over
14. The required bias voltage (2.35V in
the case of Fig.1.7) can be obtained in
various ways, but one of the most basic
arrangements is nothing more than
a resistive potential divider derived
either from the DC supply rail or from
the drain connection.
the circuit shown in Fig.1.9 provides a
voltage gain of around 40 so that an input
of 100mVpk-pk will produce an output of
4Vpk-pk, and so on. The input resistance
of both circuits is approximately 500kΩ
(determined largely by R1 and R2) and
the measured frequency response extends
from less than 10Hz to well over 200kHz
at the –3dB points.
Negative feedback and bias
stabilisation
The circuit of Fig.1.8 employs two forms
of negative feedback: shunt voltage
feedback from drain to gate via R3 and
series current feedback using R4 in the
connection from source to ground. These
two feedback loops help to stabilise the
DC operating conditions, ensuring that
the operating conditions remain within
the desired range despite variations in
MOSFET parameters and temperature.
They also make a significant improvement in the overall linearity of amplifier.
Operation of the shunt feedback loop
is as follows. If the gate-source voltage
increases the drain current will increase
as a direct consequence. The increase in
drain current will result in an increased
potential drop across the load resistance
A basic 2N7000 amplifier
A basic common-source amplifier is
shown in Fig.1.8. The load for the stage
is provided by R3, while the gate-source
bias voltage (which needs to be approximately 2.2V for optimum operating conditions in this circuit) is defined by the
potential divider formed by R1 and R2.
Optimum operating conditions are those
that will give the maximum undistorted
output voltage swing. This condition
occurs when the drain voltage is about
40
Fig.1.11. Using Virtins Multi-Instrument PC-based software to analyse and measure the
total harmonic distortion (THD) produced by the circuit of Fig.1.10.
Practical Electronics | January | 2021
on the drain load of the first stage (TR1) and
produces a nominal voltage gain of 10. The
measured frequency response extends from
around 4.5Hz to 450kHz. Notice how negative
feedback (via R1) is applied over both stages
(ie, from the source of the second stage to the
gate of the first stage).
Distortion
Fig.1.12. Using Virtins Multi-Instrument PC-based software to analyse and
measure the total harmonic distortion (THD) produced by the circuit of Fig.1.10.
No amplifier is perfectly linear, and no
amplifier can provide a perfect representation
of its input. The result of non-linearity is
distortion and, while a small level of distortion
may be undetectable by ear, designers usually
go to great lengths to reduce the level of
distortion introduced by an amplifier.
It is important to note that, as an amplifier is
driven harder, the distortion that it produces
will increase. The circuit shown in Fig.1.10
Fig.1.13. A twin-tee oscillator based on the two-stage gain block in Fig.1.10.
Fig.1.15. 8MHz crystal oscillator using a 2N7000.
(RL). As a result, the drain voltage will
fall, which, in turn, reduces the gate
bias voltage. Capacitors, C1 and C2
respectively, are used to couple signals
into and out of the stage. Put simply,
these capacitors pass AC signals but
keep the DC gate bias and drain voltages
safely within the amplifier stage.
An improved ‘gain block’
An improved two-stage amplifier is
shown in Fig.1.10. The first stage acts as
a common-source amplifier with a high
input impedance; the second as a sourcefollower with a low output impedance.
The two-stage ‘gain block’ arrangement
reduces the effect of output loading
typically produces around 0.25% total
harmonic distortion (THD) when a
signal of 100mVpk-pk is applied, as
shown in Fig.1.11. (Note that the THD
increases to around 6% for the circuit
of Fig.1.9 with the same signal.) It
is therefore important to avoid overdriving an amplifier, particularly where
the internal gain is appreciable.
A high-gain amplifier
A high-gain amplifier is shown in
Fig.1.12. This arrangement uses two
cascaded common-source amplifier
stages. This circuit produces a typical
voltage gain of 250 with C3 not fitted,
increasing to around 370 with C3 fitted
(as shown in Fig.1.12). Note that signal
levels must be kept low to avoid overdriving the second stage.
Sinusoidal oscillators
Fig.1.14. Using Tina Pro to check and optimise component values for the twin-tee
oscillator shown in Fig.1.13.
Practical Electronics | January | 2021
As well as its use in small-signal
amplifiers, the 2N7000 can be used in
a wide variety of sinusoidal oscillator
applications. Fig.1.13 shows a simple
twin-tee oscillator based on the twostage gain block in Fig.1.10. The circuit
provides an output of around 8Vpk-pk at
approximately 100Hz. The frequency of
41
