Fullscreen HTML5Med Res (??MB)HTML4

Circuit Surgery Regular clinic by Ian Bell Electronically controlled resistance – Part 6 T his month, we continue our series on electronically controlled resistance by looking at the use of digipots in circuits such as variable gain amplifiers. As discussed in the last couple of articles, digipots are either potentiometers or simple variable resistors (rheostats) whose value (wiper position or resistor value respectively) can be controlled by a digital control input. They can replace mechanical potentiometers and trimmers in many applications. Most commonly, the digital control is via a standard microprocessor interface, such as SPI, but other simpler interfaces are available, for example to facilitate use of up/down pushbuttons. Two months ago, we introduced ‘digipots’, describing the basics of their operation, structure and key characteristics, and illustrating this with some example devices. A digipot circuit is typically a resistor ladder (series chain of resistors) connected to an array of switches, one on each ‘tap’ on the resistor chain. One switch is on to set the wiper position of the potentiometer, or variable resistor value. Last month, we focused on approaches to simulating generic digipots in LTspice, and discussed non-ideal characteristics, particularly wiper resistance and resistance variation (tolerance). Digipot model We will use one of these simulation models again this month in the context of variable-gain amplifier circuits using digipots – specifically, the abstract model based on a simple potentiometer shown in 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣% + (1 − 𝑁𝑁)𝑣𝑣$ A RA W RB (1 – N)RAB Wiper NRAB B Fig.1. Basic digipot model. N is wiper position from N = 0 at B to N = 1 at A. 56 Fig.1. This model is convenient to use for limit(x,y,z) function, to limit the exploring general circuit behaviour rather minimum resistance to some very small than attempting to simulate specific devices value (eg, 1mΩ) and the maximum to – for example, the input is just a control the RAB value (Rdigipot). An LTspice voltage, not a digital code, but this makes schematic using this approach is shown the schematic smaller and simulations easier in Fig.2 – this is not a full simulation to set up (only one control signal is needed, schematic – refer to last month for an rather than multiple digital bits). The model example. The behavioural voltage source uses a behavioural voltage source and (B1) is used to create a stepped waveform behavioural resistances, where the voltage on node N, starting at 0V at time 0 and of a source (BV element), or resistance of a stepping every step-time (stept parameter) resistor (R element, as in a standard resistor) by 1/(number of steps) (nsteps parameter) can be set by a mathematical expression. until a maximum of 1 is reached. This In general, a digipot can be modelled as takes the digipot through its full range if two resistors RA and RB such that the total the simulation is run for an appropriate time (nsteps × stept or longer). resistance RA + RB = RAB, where RAB is the resistance between the terminals A and B, the specified resistance of the digipot (see Potentiometer formulae Electronically controlled resistance – Part 6 Fig.1). The relative values of RA and R Fig.3 shows the digipot from Fig.1 used B depend on the wiperElectronically position. If we define as a grounded potentiometer. Using the controlled resistance – Part 6 the wiper position as a value N, where N potential divider formula for vout we get: = 0 with the wiper at B and N = 1 with the 𝑅𝑅$ 𝑁𝑁𝑁𝑁%$ 𝑣𝑣!"# = 𝑣𝑣&' = 𝑣𝑣&' wiper at A then we can write RA = (1 – N) (1 𝑅𝑅 + 𝑅𝑅 − 𝑁𝑁)𝑅𝑅 % $ 𝑁𝑁𝑁𝑁%$ %$ + 𝑁𝑁𝑁𝑁%$ RAB and RB = NRAB. For a digipot with𝑣𝑣S = 𝑅𝑅$ 𝑣𝑣 = 𝑣𝑣 !"# &' (1 − 𝑁𝑁)𝑅𝑅 𝑅𝑅% +R𝑅𝑅 𝑁𝑁𝑁𝑁%$ &'leaving (strictly S + 1) wiper settings, we control in the division, The $ terms cancel %$ + AB N by applying a digital word D which can the two instances of N to cancel in the range from 0 to S, thus N = S/D. denominator, so we𝑁𝑁get a simple expression: 𝑣𝑣!"# = 𝑣𝑣&' = 𝑁𝑁𝑣𝑣&' Last month, we introduced an LTspice 𝑁𝑁(1 − 𝑁𝑁) + 𝑁𝑁 model for a digipot based on Fig.1 and 𝑣𝑣!"# = 𝑣𝑣 = 𝑁𝑁𝑣𝑣&' (1 − 𝑁𝑁) + 𝑁𝑁 &' using a voltage node (V(N)), which can vary from 0 to 1V to represent N. We used This is important because the output does (1 − 𝑁𝑁)𝑅𝑅 𝑅𝑅%on RAB. As discussed two behavioural resistors with values set by not depend last %$ month, 𝑣𝑣!"# = 𝑣𝑣$ = 𝑣𝑣$ expressions based on RA = (1 – N)RAB and the total resistance of digipots can%$vary 𝑅𝑅 + 𝑅𝑅 𝑁𝑁𝑁𝑁 $ %$ + (1 − 𝑁𝑁)𝑅𝑅 (1 − 𝑁𝑁)𝑅𝑅 𝑅𝑅% % %$ 𝑣𝑣!"# =significantly 𝑣𝑣 = 𝑣𝑣 between individual devices (eg, RB = NRAB to implement a potentiometer. 𝑅𝑅% + 𝑅𝑅$ $ 𝑁𝑁𝑁𝑁%$ + (1 − 𝑁𝑁)𝑅𝑅%$ $ 20% in some cases), but the resistors in the However, because the behavioural resistor ladder are much more accurately matched value must not be set to zero, and ideally 𝑣𝑣!"# = Therefore, 𝑁𝑁𝑣𝑣% + (1 − circuits 𝑁𝑁)𝑣𝑣$ to one another. which not become negative, we can use the LTspice 𝑣𝑣!"# 𝑅𝑅( =− 𝑣𝑣 𝑅𝑅) &' 𝑣𝑣!"# 𝑅𝑅( =− 𝑣𝑣&' 𝑅𝑅) 𝑣𝑣!"# 𝑅𝑅( =1+ 𝑣𝑣 𝑅𝑅 &' 𝑅𝑅 * 𝑣𝑣!"# ( =1+ 𝑣𝑣&' 𝑅𝑅* 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 𝑁𝑁 =− =− =− (1 𝑣𝑣 𝑅𝑅 − 𝑁𝑁)𝑅𝑅 (1 − 𝑁𝑁) &'𝑅𝑅 % 𝑁𝑁𝑅𝑅 %$ 𝑁𝑁 𝑣𝑣!"# $ %$ =− =− =− (1 − 𝑁𝑁)𝑅𝑅%$ 𝑅𝑅% (1 − 𝑁𝑁) Fig.2. Using LTspice behavioural resistors to model a digipot.𝑣𝑣&' 𝑣𝑣!"# Practical Electronics | 𝐷𝐷February | 2023 𝑣𝑣!"# 𝑣𝑣&' =− =− 𝐷𝐷 (𝑆𝑆 − 𝐷𝐷) Electronically controlled resistance – Part 6 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣% + (1 − 𝑁𝑁)𝑣𝑣$ Vin RA = 𝑁𝑁𝑣𝑣 Electronically controlled resistance𝑣𝑣–!"# Part 6 % + (1 − 𝑁𝑁)𝑣𝑣$ 𝑅𝑅$ 𝑁𝑁𝑁𝑁%$ 𝑣𝑣!"# = 𝑣𝑣!"# 𝑣𝑣𝑅𝑅 = 𝑣𝑣 𝑅𝑅% +=𝑅𝑅$− &'( (1 − 𝑁𝑁)𝑅𝑅%$ + 𝑁𝑁𝑁𝑁%$ &' A VA A 𝑣𝑣&' 𝑅𝑅) (1 – N)RAB RB 𝑣𝑣!"# is 𝑁𝑁𝑁𝑁 𝑅𝑅(%$ (1 –𝑅𝑅N)R RA where R is the feedback resistor $ AB 𝑣𝑣!"# = 𝑣𝑣 =𝑣𝑣 = − 𝑅𝑅F 𝑣𝑣&' &'R ) input (1 𝑅𝑅% + 𝑅𝑅$ &' and −I is 𝑁𝑁)𝑅𝑅 + 𝑁𝑁𝑁𝑁resistor the%$ (see Fig.5). %$ 𝑁𝑁 Vout W 𝑣𝑣!"# = non-inverting 𝑣𝑣&' =amplifier, 𝑁𝑁𝑣𝑣&' 𝑣𝑣For 𝑅𝑅( the !"# the Vout W 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣% + (1 − 𝑁𝑁)𝑣𝑣$ NRAB NRAB RB = 1(1 + − 𝑁𝑁) + 𝑁𝑁 is given 𝑣𝑣gain 𝑅𝑅* by: &' 𝑣𝑣!"# 𝑅𝑅( =− 𝑣𝑣&' +𝑅𝑅) Vin Vout – RF 𝑣𝑣!"# 𝑅𝑅( =1+ 𝑣𝑣&' 𝑅𝑅* RG 𝑣𝑣𝑁𝑁!"# 𝑅𝑅( = 1𝑣𝑣&' + = 𝑁𝑁𝑣𝑣&' 𝑣𝑣&'+ 𝑁𝑁 𝑅𝑅* (1 − 𝑁𝑁) (1 − 𝑁𝑁)𝑅𝑅%$ 𝑅𝑅% 𝑣𝑣 = 𝑣𝑣 = feedback 𝑣𝑣 𝑣𝑣 𝑣𝑣 𝑅𝑅 𝑁𝑁𝑅𝑅 𝑁𝑁 resistor and 𝑅𝑅 𝑁𝑁𝑅𝑅%$ 𝑁𝑁 !"# $ the !"# $ %$ Here, R is Fig.4. Non-grounded F 𝑅𝑅% + 𝑅𝑅$ 𝑁𝑁𝑁𝑁−%$ + (1 − 𝑁𝑁)𝑅𝑅%$ $ !"# = − $ = − =− =− = =− (1 (1 𝑣𝑣 𝑅𝑅 − 𝑁𝑁)𝑅𝑅 (1 − 𝑁𝑁) 𝑣𝑣 𝑅𝑅 − 𝑁𝑁)𝑅𝑅 (1 − 𝑁𝑁) R resistor (see Fig.6).&' &' using% %$ % %$ Fig.3. Grounded potential potential divider G is the grounded Fig.6. Op amp non-inverting amplifier. From Fig.5 and Fig.6 we see that a digipot. divider using a digipot. 𝑣𝑣!"# 𝑅𝑅 𝑅𝑅$ 𝑁𝑁𝑅𝑅 𝑁𝑁 %$𝑁𝑁)𝑅𝑅%$ (1 − % − gain have a value of a few picofarads. It is only circuits= the is set by two 𝑣𝑣!"# =𝑣𝑣 = − 𝑅𝑅𝑣𝑣$=for =− both 𝑣𝑣−$ 𝑁𝑁) (1 − 𝑁𝑁)𝑅𝑅 (1 &' % %$ (1 𝑅𝑅 + 𝑅𝑅$ 𝑁𝑁𝑁𝑁%$ + − 𝑁𝑁)𝑅𝑅%$ shown here, but may be required in any in(1series that the depend only on functions related to the% resistors 𝑣𝑣connected − 𝑁𝑁)𝑣𝑣and !"# = 𝑁𝑁𝑣𝑣% + $ 𝑣𝑣 𝐷𝐷 𝐷𝐷 !"# of the𝑣𝑣circuits gain !"# is set ratio RA to RB, and not directly on RAB, suffer = by − the ratio of the resistor values. = − discussed in this article. 𝑣𝑣 (𝑆𝑆 − 𝐷𝐷) 𝑣𝑣 (𝑆𝑆 − 𝐷𝐷) digipot A and B &' If we&'switch the The resistor configuration matches that of much less due to variation of individual B VB B 𝑣𝑣!"# = terminals around (for the circuit in Fig.7) digipot, and the digipots. As we will discuss later, this is 𝑣𝑣 a = 𝑣𝑣!"# + (1 𝐷𝐷 ratio-based formulae 𝑁𝑁𝑣𝑣 !"# % = − −𝑣𝑣𝑁𝑁)𝑣𝑣$ 𝑅𝑅(a digipot without !"# we get a different formula for gain: indicate could use relevant to how digipots are used in circuits 𝑣𝑣&' that we (𝑆𝑆 − 𝐷𝐷) =− 𝑣𝑣&' 𝑅𝑅) on the absolute the gain being dependent such as variable gain amplifiers, particularly (1 − 𝑁𝑁) (1 − 𝑁𝑁) 𝑣𝑣!"# (𝑆𝑆 − 𝐷𝐷) 𝑣𝑣!"# (𝑆𝑆 − 𝐷𝐷) value if reasonable accuracy is required without resistance. = − of the R= =− =− AB− 𝑣𝑣&' 𝑁𝑁 𝐷𝐷 𝑣𝑣&' 𝑁𝑁 𝐷𝐷 the need for software calibration. 𝑣𝑣!"# 𝑅𝑅( = − (1 𝑣𝑣 − 𝑁𝑁) (𝑆𝑆 − 𝐷𝐷) However, this does not change the basic Fig.4 shows a non-grounded potentiometer !"# Inverting amplifier using a 𝑅𝑅 )𝑣𝑣 = − =𝑣𝑣&' − 𝑅𝑅( !"# 𝑁𝑁 behaviour of the circuit – it just reverses with voltages applied at both ends (vA and 𝑣𝑣&' single digipot = 1 𝐷𝐷 + 𝑣𝑣&' and Fig.7 𝑅𝑅* we see R = R the order of the D-to-gain relationship. vB). This is more complex to deal with than Comparing Fig.5 F B The circuit produces exactly the same the grounded case. We use the circuit theory and RI = RA so the gain for the inverting 𝑣𝑣!"# 𝑅𝑅( the digipot is: set of possible gain values, but with D principle of superposition. This states that amplifier using cally controlled resistance – Part 6 =1+ 𝑣𝑣 𝑅𝑅 less than S/2 amplifying, and D greater for a linear circuit we can set all sources 𝑣𝑣!"#&' 𝑅𝑅$ * 𝑁𝑁𝑅𝑅%$ 𝑁𝑁 =− =− =− than S/2 attenuating. At D = S/2 the gain except for one to zero, calculate the output (1 − 𝑁𝑁)𝑅𝑅%$ 𝑣𝑣&' 𝑅𝑅% (1 − 𝑁𝑁) olled resistance – Part 6 one source, then repeat for is –1, and at D = 1 the gain is –(S – 1). for just that 𝑅𝑅$ in turn, and finally 𝑁𝑁𝑁𝑁%$add up the source that the gain does not 𝑣𝑣each 𝑣𝑣&' = 𝑣𝑣&' 𝑅𝑅 which confirms !"# = 𝑣𝑣circuit 𝑁𝑁𝑅𝑅 𝑁𝑁 !"# (1 − 𝑁𝑁)𝑅𝑅 𝑅𝑅% + 𝑅𝑅 + 𝑁𝑁𝑁𝑁 $ %$ the %$ = − $depend individual contributions. For on%$RAB.=We Non-inverting amplifier using a =− − can also write this (1 𝑣𝑣 𝑅𝑅 − 𝑁𝑁)𝑅𝑅 (1 − 𝑁𝑁) &' %formula in terms %$ of the𝐷𝐷number in Fig.4, if we set v𝑁𝑁𝑁𝑁 of wiper single digipot 𝑣𝑣 B = 0 we have the same !"# 𝑅𝑅 $ %$ = − input value (D) using 𝑣𝑣!"# = situation 𝑣𝑣&' =as in Fig.3 with vin 𝑣𝑣=&'vA, so the steps (S) and digital Comparing Fig.6 and Fig.8 we see RF = RB 𝑣𝑣&' (𝑆𝑆 − 𝐷𝐷) (1 − 𝑁𝑁)𝑅𝑅%$ + 𝑁𝑁𝑁𝑁%$ 𝑅𝑅% + 𝑅𝑅$ wiper position N = S/D: contribution to vout is NvA. For vA = 0 we and RG = RA, so the gain for the inverting 𝑁𝑁 effectively have the circuit Fig.3 amplifier using the digipot is: 𝑣𝑣!"# = 𝑣𝑣 in = 𝑁𝑁𝑣𝑣 &' with 𝑣𝑣!"# 𝐷𝐷 (1 − 𝑁𝑁) + 𝑁𝑁 &' =− the A and B digipot terminals switched 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 1 𝑣𝑣&' (𝑆𝑆 − 𝐷𝐷) =1+ =1+ = (1 − 𝑁𝑁) round (A𝑁𝑁is grounded, B is the input), so 𝑣𝑣!"# (𝑆𝑆 − 𝐷𝐷) (1 𝑣𝑣 𝑅𝑅 − 𝑁𝑁)𝑅𝑅 (1 − 𝑁𝑁) &' % %$ 𝑣𝑣!"# 𝑅𝑅 𝑁𝑁𝑅𝑅%$ 1 =− =− 𝑣𝑣!"#the = potential divider 𝑣𝑣 = 𝑁𝑁𝑣𝑣&' becomes: As the𝑣𝑣wiper moves D==10)+ $ = 1 + 𝑁𝑁 from B (N 𝐷𝐷 = 0, = (1 − 𝑁𝑁) + 𝑁𝑁 &' formula &' (1 𝑣𝑣 𝑅𝑅 − 𝑁𝑁)𝑅𝑅 (1 − 𝑁𝑁) &' %$ to A (N = 1, D = S) the gain (according to % This also confirms that the gain does not (1 − 𝑁𝑁)𝑅𝑅%$ 𝑅𝑅% 𝑣𝑣!"# = 𝑣𝑣$ = 𝑣𝑣$𝑣𝑣 the(1 formula) changes from zero to minus depend on R . Just like above, we can AB − 𝑁𝑁) (𝑆𝑆 − 𝐷𝐷) 𝑅𝑅% + 𝑅𝑅$ 𝑁𝑁𝑁𝑁%$ + (1 − 𝑁𝑁)𝑅𝑅%$ !"# =infinity, − =− although the effective value of also write this formula 𝑣𝑣 𝑆𝑆 using S and D: !"# 𝑣𝑣&' 𝑁𝑁 𝐷𝐷 = (1 in 𝑅𝑅% simplifies − 𝑁𝑁)𝑅𝑅 RA will never be exactly zero (to give This a similar way to the 𝑣𝑣 (𝑆𝑆 − 𝐷𝐷) %$ &' 𝑣𝑣!"# 𝑆𝑆 𝑣𝑣!"# = 𝑣𝑣 = 𝑣𝑣$ = vout infinite gain) due to the resistance of (1 give 𝑅𝑅%previous + 𝑅𝑅$ $ formula 𝑁𝑁𝑁𝑁%$ + to − 𝑁𝑁)𝑅𝑅 %$ = (1 – N)vB. 𝑣𝑣&' (𝑆𝑆 − 𝐷𝐷) digipot A terminal. Similarly, the gain Adding the contributions gives the 𝑣𝑣!"#two = 𝑁𝑁𝑣𝑣 % + (1 − 𝑁𝑁)𝑣𝑣$ with D = 0 will be non-zero, but there output voltage for the circuit in Fig.4 as: As the wiper moves from B (N = 0, D = 0) 1 gain 𝑆𝑆 (according to will be significant attenuation. In practice, to A (N = 1, D𝑣𝑣=!"#S)=the = 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣% + (1 − 𝑁𝑁)𝑣𝑣$ 𝑣𝑣 𝑁𝑁 𝐷𝐷 very large gains are likely to cause the op the formulae) changes from 1 to infinity 𝑣𝑣!"# 1 𝑆𝑆 &' = = 𝑣𝑣!"# 𝑅𝑅( amp output to saturate near the supply (the op-amp will saturate at very large 𝑣𝑣&' 𝑁𝑁 𝐷𝐷 =− voltage (signal clipping). gains). Like the inverting circuit, the Again, note that𝑣𝑣&' this does 𝑅𝑅) not depend on With D = S – 1 we get a gain of –(S – relationship between D and the gain is the digipot RAB, only on the wiper position 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 𝐷𝐷𝑅𝑅%$ 𝑣𝑣 𝑅𝑅 1) (substitute D = S – 1 in the formula non-linear, but (N). We!"# will use(this formula later. = the=form of=the relationship =− 𝑣𝑣%$ 𝑅𝑅) %$ 𝑅𝑅) 𝑆𝑆𝑆𝑆) 𝑣𝑣&' 𝑅𝑅) &' 𝑣𝑣!"# is𝑅𝑅different 𝑁𝑁𝑅𝑅 𝐷𝐷𝑅𝑅 $ above), which may be very large for – = = = it is not simply a positive𝑣𝑣 𝑅𝑅 𝑅𝑅) version 𝑅𝑅) of the 𝑆𝑆𝑆𝑆)same behaviour. Unlike !"# ( digipots with a large numbers of steps𝑣𝑣&' gain Op amp amplifiers =1+ 𝑣𝑣&'show the 𝑅𝑅* schematics of (eg, S = 1024). With D = S/2 (at N = 0.5) Fig.5 and Fig.6 D (wiper position input) we get unity inverting gain (–1). For D the well-known 𝑣𝑣!"# 𝑅𝑅(basic op amp amplifier 𝑣𝑣+ = −𝐺𝐺𝑣𝑣&' =the 1 +inverting (Fig.5) and nonless than S/2 the circuit attenuates, and circuits – 𝑣𝑣&' 𝑅𝑅* 𝑣𝑣+ = −𝐺𝐺𝑣𝑣&' Digipot for D greater than S/2 it amplifies. The inverting (Fig.6) configurations. The gain RA RB 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 𝑁𝑁 W variation of gain with D is nonlinear – we of the=inverting − = −amplifier is given = − by: Vin (1 − 𝑁𝑁)𝑅𝑅%$ 𝑣𝑣&' 𝑅𝑅% (1 − 𝑁𝑁) A B will discuss this in more detail later. The 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣&' − (1 − 𝑁𝑁)𝐺𝐺𝑣𝑣&' rapid increase in gain at larger D values 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 𝑁𝑁 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣&' − (1 − 𝑁𝑁)𝐺𝐺𝑣𝑣&' =− =− = − RF means that the choice of specific gain (1 𝑣𝑣&' 𝑅𝑅% − 𝑁𝑁)𝑅𝑅%$ (1 − 𝑁𝑁) CC – values is limited in this part of the range. 𝑣𝑣!"# 𝐷𝐷 RI 𝑣𝑣!"# 𝐷𝐷 Vout =− – The capacitor CC shown in Fig.7 is Vin = 𝑁𝑁(𝐺𝐺 + 1) − 𝐺𝐺+= (𝐺𝐺 + 1) − 𝐺𝐺 𝑣𝑣&' (𝑆𝑆 − 𝐷𝐷) 𝑣𝑣&' 𝑆𝑆 a compensation capacitor across 𝑣𝑣!"#the 𝐷𝐷 Vout = 𝑁𝑁(𝐺𝐺 + 1) − 𝐺𝐺 = (𝐺𝐺 + 1) − 𝐺𝐺 + 𝑣𝑣!"# 𝐷𝐷 feedback resistance that may be required 𝑣𝑣&' 𝑆𝑆 =− 𝑣𝑣&' (𝑆𝑆 − 𝐷𝐷) to overcome instability caused by the Fig.7. Inverting op amp amplifier with effect of the capacitance of the digipot (1 − 𝑁𝑁) 𝑣𝑣!"# (𝑆𝑆 − 𝐷𝐷) 𝑣𝑣!"#control. 2𝐷𝐷 = − op amp = − digipot gain inputs on the op amp. Typically, it will Fig.5. Inverting amplifier. = 2𝑁𝑁 − 1 = −1 𝑣𝑣&' 𝑁𝑁 𝐷𝐷 (1 − 𝑁𝑁) 𝑣𝑣!"# (𝑆𝑆 − Practical | 𝐷𝐷) February | 2023 = − Electronics =− 𝑣𝑣&' 𝑁𝑁 𝐷𝐷 𝑣𝑣&' 2𝐷𝐷 𝑣𝑣!"# = 2𝑁𝑁 − 1 = −1 𝑣𝑣&' 𝑆𝑆 𝑆𝑆 57 + Vin Vout – Digipot RA A RB W B D (wiper position input) Fig.8. Op amp non-inverting amplifier with digipot control. the inverting version, the non-inverting version does not attenuate for any D values – the minimum gain setting is unity (one). 𝑅𝑅$ At D = S/2 𝑁𝑁𝑅𝑅the !"# %$ gain is 12. The number of =1+ =1+ = (1 − 𝑅𝑅% possible 𝑁𝑁)𝑅𝑅%$ (1gain − 𝑁𝑁)values is twice amplifying &' that of the inverting circuit, giving finer amplification control for a given number of wiper steps, provided attenuation is 𝑣𝑣!"# 𝑆𝑆 not needed. = 𝑣𝑣&' (𝑆𝑆 switch − 𝐷𝐷) If we the digipot A and B terminals around (for the circuit in Fig.8), and rework the formula we get: 𝑣𝑣!"# 1 𝑆𝑆 = = 𝑣𝑣&' 𝑁𝑁 𝐷𝐷 As before, this reverses the order of the D-to-gain relationship and produces 𝑣𝑣!"# exactly 𝑅𝑅$ 𝑁𝑁𝑅𝑅the 𝐷𝐷𝑅𝑅%$ set of possible gain %$ same = = = values. At D = S the gain is 1, at D = S/2 𝑣𝑣&' 𝑅𝑅) 𝑅𝑅) 𝑆𝑆𝑆𝑆 ) the gain is 2 and at D = 1 the gain is S. Fig.10. Simulation results for the circuit in Fig.9. LTspice simulations 𝑣𝑣+ = shows −𝐺𝐺𝑣𝑣&' an LTspice schematic for Fig.9 simulating the inverting amplifier with digipot gain setting, with the digipot modelled using the approach shown in 𝑣𝑣!"# =Fig.2. 𝑁𝑁𝑣𝑣&' The − (1 digipot − 𝑁𝑁)𝐺𝐺𝑣𝑣&' is configured to have 33 wiper settings (S = 32) and the simulation is run for 32ms with N stepped every 1ms from N𝐷𝐷= 0 to N = 31/32 = 0.96875, 𝑣𝑣!"# (𝐺𝐺 + 1) −gain = 𝑁𝑁(𝐺𝐺 avoiding + 1) − 𝐺𝐺 =the infinite 𝐺𝐺 case for N = 1. 𝑣𝑣&' 𝑆𝑆 The input is 0.1V DC, so that it is easy to plot the gain as: V(out)/V(in). The simulation results are shown in 𝑣𝑣!"# Fig.10. The upper 2𝐷𝐷 pane shows N, the wiper = 2𝑁𝑁 − 1 = −1 The middle pane shows 𝑣𝑣&' position control. 𝑆𝑆 the two resistor values (RA and RB) – it can be seen than these vary between 0 and 10kΩ in opposite directions as N varies (the total RA + RB is always 10kΩ which is the digipot resistance as specified by the Rdigipot parameter in the simulation. The lower pane shows the gain, which varies from 0 to –31, as indicated by the formula given above for N = 0 to 31/32. The gain is 1 for N = 0.5 (D = 16, at 16ms), again confirming the formula. As discussed earlier, the variation of gain is not linear with N, which may be useful in some applications but makes the circuit unsuitable for many other applications. The non-linearity is not strictly logarithmic, so the gain steps are not in a fixed number of decibels, as might be required in applications such as audio. Similar to Fig.9, Fig.11 shows an LTspice schematic for simulating the non-inverting amplifier with digipot gain setting. The simulation setup is the same as for the inverting amplifier (Fig.9). Plots of N and the RA and RB resistor values are the same as in Fig.10. The gain plot is shown in Fig.12. The gain varies from 1 to 32, as indicated by the formula given above, for N ranging from 0 to 31/32. The gain is 2 for N = 0.5 (D = 16, at 16ms). As for the inverting amplifier, the gain does not vary linearly with N. Alternative circuits Fig.9. LTspice schematic for inverting op amp amplifier with digipot gain control. As noted, the non-linear D-to-gain relationship for the circuits discussed above may make them unsuitable in some applications. One possibility is to add fixed resistors to both ends of the digipot; for example, see Fig.13. The arrangement was discussed last month for a basic potentiometer. It reduces the control range, increasing resolution within that range (so it is more likely that a wiper step can provide the required value). The D-to-gain relationship is more linear within 58 Practical Electronics | February | 2023 Analog Devices provide some digipots, such as the AD5124, with a ‘linear gain mode’ designed to overcome this issue. These devices allow individual control of the R A and R B resistor values in a single digipot, so it can be used in a similar way to the circuit in Fig.14 (one resistor effectively fixed, the other varied to set the gain). Linear gain in 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 1 potentiometer mode =1+ =1+ = (1 − 𝑁𝑁)𝑅𝑅%$ (1 − 𝑁𝑁) 𝑣𝑣&' 𝑅𝑅% The circuit in Fig.15 is an inverting amplifier with fixed gain resistors RF and RI, as in so𝑆𝑆 the gain from vin to vx is –RF/ 𝑣𝑣Fig.5, !"# = digipot is connected between v in 𝑣𝑣R&'I. A (𝑆𝑆 − 𝐷𝐷) 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅 1 %$ a potential = 1and + vx=forming 1+ = divider whose 𝑣𝑣&' 𝑅𝑅% (v (1 − 𝑁𝑁)𝑅𝑅 (1by − 𝑁𝑁) %$ output ) is buffered the1unity𝑣𝑣!"# 𝑅𝑅$out 𝑁𝑁𝑅𝑅%$ = 1op + amp = 1amplifier + gain (A2)= to prevent (1 − 𝑁𝑁)𝑅𝑅%$ (1 − 𝑁𝑁) 𝑣𝑣&' 𝑅𝑅% 𝑣𝑣loading 1 of 𝑆𝑆 the digipot and reduce the !"# = = 𝑣𝑣&' 𝑁𝑁 𝐷𝐷 effect of wiper resistance. This circuit is 𝑣𝑣!"# 𝑆𝑆 based on a=design by Alan Li published 𝑣𝑣&' (𝑆𝑆 − 𝐷𝐷) in Analog 𝑣𝑣Devices’ 𝑆𝑆 technical journal !"# = (35-3 (2001)). Analog Dialogue 𝑣𝑣&' (𝑆𝑆 − 𝐷𝐷) 𝑣𝑣!"# 𝑅𝑅$Op𝑁𝑁𝑅𝑅 𝐷𝐷𝑅𝑅%$ %$ = = amp =A1 amplifies vin by the gain 𝑣𝑣&' 𝑅𝑅) by 𝑅𝑅 𝑆𝑆𝑆𝑆 ) fixed set the RF and RI with 𝑣𝑣!"# 1 )resistors 𝑆𝑆 = = gain –R𝑣𝑣F/RI (as in Fig.5). If we define G = 𝑁𝑁 𝐷𝐷 &' 1 output 𝑆𝑆 RF/RI we can𝑣𝑣write the of A1 (vx) as: !"# Fig.11. LTspice schematic for non-inverting op amp amplifier with digipot gain control. Fig.12. Simulation results for the circuit in Fig.11. the reduced range, but, as was discussed last month, there is some dependence on the RAB resistance with this arrangement, 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 1 a reduction in accuracy = 1so + potentially =1+ = (1 − 𝑁𝑁)𝑅𝑅%$ (1 − 𝑁𝑁) 𝑣𝑣&' 𝑅𝑅% and not all possible values can be set with all devices. A similar effect can be achieved with a resistor in parallel with the digipot, or𝑆𝑆a combination of series 𝑣𝑣!"# = resistors. and parallel 𝑣𝑣&' (𝑆𝑆 − 𝐷𝐷) Another solution to the linearity issue is to use the digipot for one of the gain setting resistors, with a fixed resistor for the other. is shown in Fig.14 𝑣𝑣!"#An1example 𝑆𝑆 = = – this uses in rheostat mode as 𝑣𝑣&' the𝑁𝑁digipot 𝐷𝐷 the RF resistor in an inverting amplifier, with a fixed RI resistor. The gain is: 𝑣𝑣+ = −𝐺𝐺𝑣𝑣&' 𝑣𝑣&' = 𝑁𝑁 = 𝐷𝐷 The gain is linearly dependent on N (or 𝑣𝑣!"# digipot 𝑅𝑅$ 𝑁𝑁𝑅𝑅 D) but is also dependent on RAB, so it The acts a %$ potential divider %$ as𝐷𝐷𝑅𝑅 = = = will be subject to the tolerance variations connected between 𝑣𝑣&' 𝑅𝑅) 𝑅𝑅) 𝑆𝑆𝑆𝑆v) in and v x – it is 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 𝐷𝐷𝑅𝑅%$ of the digipot resistance, reducing the a non-grounded divider as =𝑁𝑁)𝐺𝐺𝑣𝑣 = potential = 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣 &' −𝑣𝑣(1 − 𝑅𝑅) &' 𝑅𝑅 𝑆𝑆𝑆𝑆 &' ) ) which v accuracy of gain setting. discussed above (Fig.4) for A This problem can be overcome by using = vin and vB = vx = –Gvin. Substituting 𝑣𝑣+ = −𝐺𝐺𝑣𝑣 &' the formula for the two digipots to control both gain-setting these values into 𝑣𝑣!"#than 𝐷𝐷 resistors using an IC with more non-grounded potential divider given 𝑣𝑣+ + = 1) −𝐺𝐺𝑣𝑣 = 𝑁𝑁(𝐺𝐺 + 1) − 𝐺𝐺 = (𝐺𝐺 − &' 𝐺𝐺 𝑣𝑣&' one digipot on chip. Digipot resistors above we 𝑆𝑆get: on the same chip are well matched, so 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣&' − (1 − 𝑁𝑁)𝐺𝐺𝑣𝑣&' although the device-to-device variation may be large, the ratio of two rheostatFrom𝑣𝑣which we obtain the following !"# = 𝑁𝑁𝑣𝑣&' − (1 − 𝑁𝑁)𝐺𝐺𝑣𝑣&' 𝑣𝑣!"# formula 2𝐷𝐷gain in terms of N, or D and mode digipots on the same chip will for = 2𝑁𝑁 − 1 = −1 𝑣𝑣&' S (using N 𝑆𝑆= D/S): be accurate (for example, typically less 𝑣𝑣!"# 𝐷𝐷 than 1% error). The disadvantage of this𝑣𝑣 = 𝑁𝑁(𝐺𝐺 + 1) − 𝐺𝐺 = 𝑆𝑆 (𝐺𝐺 + 1) − 𝐺𝐺 &' 𝑣𝑣!"# 𝐷𝐷 approach is that it requires two digipots = 𝑁𝑁(𝐺𝐺 + 1) − 𝐺𝐺 = (𝐺𝐺 + 1) − 𝐺𝐺 𝑣𝑣&' 𝑆𝑆 to control one amplifier, increasing cost 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 𝐷𝐷𝑅𝑅%$ and complexity. = = = 𝑣𝑣&' 𝑅𝑅) 𝑅𝑅) 𝑆𝑆𝑆𝑆) 𝑣𝑣!"# 2𝐷𝐷 this we see the gain From = 2𝑁𝑁 − 1 = −1 is linearly dependent on N 𝑣𝑣&' 𝑆𝑆 2𝐷𝐷 D (wiper position input) 𝑣𝑣!"# (or D) and does = 2𝑁𝑁 − 1 = − 1not depend D (wiper position input) 𝑣𝑣&' on the digipot 𝑆𝑆 R resistance, Digipot AB 𝑣𝑣+ = −𝐺𝐺𝑣𝑣 Digipot &' so this circuit can provide RI RA RB W R2 RA RB R1 accurate linear gain control. Vin W A B Vin Unlike the previous circuits A B which only feature one 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣&' − (1 − 𝑁𝑁)𝐺𝐺𝑣𝑣&' – – polarity of gain, the gain can Vout Vout be set to be either positive + + (non-inverting) or negative 𝑣𝑣!"# 𝐷𝐷 (inverting), ranging from –G = 𝑁𝑁(𝐺𝐺 + 1) − 𝐺𝐺 = (𝐺𝐺 + 1) − 𝐺𝐺 at N = 0 (D = 0) to +1 at N = 𝑣𝑣&' 𝑆𝑆 1 (D = S). There are also no Fig.13. Adding series resistors to the digipot Fig.14. Linear gain control using a digipot in ‘infinite gain’ cases. increases linearity and resolution. rheostat mode. 𝑣𝑣!"# 2𝐷𝐷 | February | 2023 Practical Electronics = 2𝑁𝑁 −1= −1 𝑣𝑣&' 𝑆𝑆 59 𝑣𝑣!"# 𝑆𝑆 = 𝑣𝑣&' (𝑆𝑆 − 𝐷𝐷) – 𝑣𝑣!"# 1 𝑆𝑆 = = 𝑣𝑣&' 𝑁𝑁 𝐷𝐷 A2 Vout Digipot RA A RB W 𝑣𝑣!"# 𝑅𝑅$ 𝑁𝑁𝑅𝑅%$ 𝐷𝐷𝑅𝑅%$ = = = 𝑣𝑣&' 𝑅𝑅) D (wiper 𝑅𝑅) 𝑆𝑆𝑆𝑆) position input) Vin RI 𝑣𝑣+ = −𝐺𝐺𝑣𝑣&' Voutb + – B RF A1 + VX 𝑣𝑣!"# = 𝑁𝑁𝑣𝑣&' − (1 − 𝑁𝑁)𝐺𝐺𝑣𝑣&' Fig.15. Linear gain control using a digipot in potentiometer mode. 𝑣𝑣!"# 𝐷𝐷 = 𝑁𝑁(𝐺𝐺 + 1) − 𝐺𝐺 = (𝐺𝐺 + 1) − 𝐺𝐺 𝑣𝑣&' If we use equal 𝑆𝑆resistors for RF and RI then G = 1, so the gain formulae for Fig.15 simplifies to: 𝑣𝑣!"# 2𝐷𝐷 = 2𝑁𝑁 − 1 = −1 𝑣𝑣&' 𝑆𝑆 This arrangement provides the most symmetrical control of inverting and noninverting gains with a range of –1 to +1. By using a standard non-inverting amplifier, with gain A, in place of the buffer (A2 in Fig.15) the gain of the circuit can be controlled over any reasonable range of –A to +A. On the other hand, RF and RI do not have to be fixed resistors – another digipot could be used here (as in Fig.7) to provide a wider range of possible gain settings. Fig.16 shows an LTspice schematic based on the circuit in Fig.15. The buffer is not included as we are just measuring the output and there is no loading or wiper resistance present in this model. The results are shown in Fig.17 and confirm the linear variation of gain from –1 to +1 as N ranges from 0 to 1. www.poscope.com/epe Simulation files Most, but not every month, LTSpice is used to support descriptions and analysis in Circuit Surgery. The examples and files are available for download from the PE website. Fig.16. LTspice simulation schematic for circuit in Fig.15. - USB - Ethernet - Web server - Modbus - CNC (Mach3/4) - IO - PWM - Encoders - LCD - Analog inputs - Compact PLC - up to 256 - up to 32 microsteps microsteps - 50 V / 6 A - 30 V / 2.5 A - USB configuration - Isolated PoScope Mega1+ PoScope Mega50 Fig.17. Simulation results for the circuit in Fig.16. 60 - up to 50MS/s - resolution up to 12bit - Lowest power consumption - Smallest and lightest - 7 in 1: Oscilloscope, FFT, X/Y, Recorder, Logic Analyzer, Protocol decoder, Signal generator Practical Electronics | February | 2023