Circuit Surgery
Regular clinic by Ian Bell
Electronically controlled resistance – Part 5
I
n this issue, we continue our
series on electronically controlled resistance. Last month, we started looking
digipots – digital potentiometers – which
are integrated circuits providing a similar
function to mechanical potentiometers
and trimmers. They are commonly interfaced to microcontrollers to adjust system
parameters such as gain and bias voltage.
We introduced the basic principles of digipots and discussed some example ICs
which demonstrate some of the characteristics and functionality that are available.
Prior to digipots we were looking at
JFETs as voltage-controlled resistors,
including a number of simulation examples
using LTspice. There was no significant
issue with setting up simulations using
JFETs as electronically controlled resistors
A
SN
RN–1
RN–2
SN–1
R0
because JFETs are basic devices in SPICE
simulation, and models for both generic
and specific commercial devices are
readily available. Digipots are more
complex integrated circuits for which
models may not be available from the
manufacturer (although some are). This
month, we will consider some approaches
to simulating digipots in LTspice and at
the same time discuss a couple of key
non-ideal digipots characteristics (and
how to simulate them as well).
Fig.1 shows the structure of a digipot
resistor ladder and switch network, which
was discussed in some detail last month.
In this schematic we have included the
wiper resistance, which is a non-ideal
characteristic exhibited by real digipots.
The wiper resistance is due to the on
resistance of the MOSFET transistors used
SN–2
RW
RN–3
R1
Fig.3. LTspice digipot schematic using basic SPICE elements.
Wiper (W)
S1
S0
B
Fig.1. Circuit structure of a digipot.
A
Control input
(wiper position)
RW
RAB
Wiper
B
Potentiometer
Fig.2. Digipot equivalent circuit.
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Fig.4. Results from simulation of the circuit in Fig.3.
Practical Electronics | January | 2023
also shown. The total resistance between
A and B (RAB) is the sum of the individual
resistors R0 to RN-1. This is the resistance
of the digipot, with commonly available
values ranging from 5kΩ to 100kΩ.
Digipot simulation approaches
When simulating a digipot we can either try
to create a circuit close to the implemented
structure, as shown in Fig.1, or use a more
abstract model, similar to the circuit in
Fig.2. We will start with the former –
Fig.3 shows an implementation of the
circuit in Fig.1 (for N = 4) using basic
SPICE elements – resistors and switches.
The switches are implemented using the
voltage-controlled switch element (‘sw’
Fig.5. Larger view of output voltage (bottom trace in Fig.4).
symbol in the component selector). The
simulation applies a 1V peak 5kHz
sinewave to the digipot circuit. RL
is a load resistor – since it is much
larger than digipot resistors it will
not have much effect.
The switch requires a model to
specify its parameters – here we
use the model name DPSw (digipot
switch). The model sets the switch
on resistance (Ron) to 50Ω, which
models the wiper resistance. The
switch off resistance (Roff) is
100MΩ. The Vt model parameter
is the switch threshold voltage. It is
set to 0.5 and is used with control
waveforms which switch been 0V
(off) and 1V (on). The switches
are controlled, via the PS0 to PS5
signals, by five pulse voltage sources
Fig.6. LTspice digipot schematic using an ADG1208 multiplexer to implement the switches.
which switch the five switches on
for 1ms each in sequence.
Using analogue
multiplexer switches
The results of the simulation are shown
in Fig.4, and Fig.5 shows a larger view of
the output waveform so that the amplitude
steps obtained by different wiper positions
can be more clearly seen. The circuit in
Fig.3 works well but is not particularly
convenient – it requires each switch to be
individually controlled, when ideally, we
want a digital code or a voltage to represent
the code value as the control input. This
issue can be overcome by using an analogue
multiplexer integrated circuit model to
implement the switches. There are a few of
Fig.7. Results from simulation of the circuit in Fig.6.
to implement the wiper position switches
(S0 to SN in Fig.1). Strictly speaking, there
is a different resistance for each switch,
so this a simplified representation. Fig.2
shows the equivalent circuit of the digipot
Practical Electronics | January | 2023
in Fig.1 – it is drawn as a potentiometer of
resistance R and a control signal to set the
wiper position (in practice this is a digital
code which selects one of the switches
S0 to SN to be on). The wiper resistance is
Fig.8. Simple LTspice schematic to
illustrate component value variation.
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Fig.9. Results from simulation of circuit in Fig.8.
Fig.10. Plotting specific sweep step waveforms of the circuit in Fig.8.
to enable the switches. Like the circuit
in Fig.3, this example applies a 1V 5kHz
sinewave to the digipot potential divider.
The results of simulating the circuit
in Fig.6 are shown in Fig.7. The binary
count on the address bits (signals n0, n1
and n2) can be seen together with the
output voltage, which is similar to that
in Fig.4 and Fig.5, except the amplitude
is stepped in the opposite direction. This
is because the switches in the circuit in
Fig.6 are in the opposite order to what
Fig.11. Using LTspice behavioural resistors to implement a variable potential divider (digipot).
they should be – but it was convenient
to drop the ADG1208 into the previous
schematic this way round and is sufficient
to show the principle of operation.
Use of the analogue multiplexer
component models makes the digipot
schematic easier to draw and facilitates use
of digital codes. 16-channel multiplexer
models are available (eg, ADG1206) and
multiple chips could be used (by controlling
their enable pins) to build larger switch
networks. The disadvantage of this approach
compared to the circuit in Fig.3 is that the
characteristics of the switches are based
on the multiplexer model and cannot be
configured to match the characteristics of
a different circuit implementation. The
circuits in Fig.3 and Fig.7 both require a
significant amount of drawing for digipots
with larger numbers of switches, which
would probably be impractical in most
cases (eg, for 1024 taps).
The effects of tolerances
Fig.12. Results from simulation of the circuit in Fig.11.
these available under the ‘Switches’ section
of the component selector in LTspice. The
ADG1208 Low Capacitance, 8-Channel,
±15V/+12V iCMOS Multiplexer from
Analogue Devices is close to the top of
the list and is suitable to use in a variant of
the circuit in Fig.3 because it has sufficient
switches (we will use five of the eight). This
is shown in Fig.6.
The ADG1208 simplifies the switch
wiring and provides decoding of a binary
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value on its address inputs (A0, A1 and
A2). The simulation uses pulse voltage
sources to control the address signals in
a similar way to the circuit in Fig.3, but
these are configured to produce a count in
binary from 0 to 5 and are set to 3.3V for
compatibility with the ADG1208 address
inputs. The ADG1208 model also requires
±15V supplies (implemented using V5
and V6). The ADG1208’s EN (enable) pin
must be connected to the positive supply
Before looking at other approaches to
implementing digipots we will take a
quick look at simulating component value
variation. All components are subject to
some variation or tolerance in individual
values. Standard single resistors are readily
available with relatively small tolerances
(±1% or less) but the total resistance (RAB
in Fig.1 and Fig.2) of many digipots are
subject to much larger tolerances, for
example ±20% or more. This may cause
difficulties in some situations, for example
by restricting the range of values (eg, bias
voltage or gain) that can be set up in a circuit.
Practical Electronics | January | 2023
would ordinarily use a numerical value –
for example, for the value of a resistor. In
the circuit in Fig.8 the parameter Rdigipot
is defined and given the value 10k by the
.param command:
.param Rdigipot=10k
The value of resistor R1 is written as
{Rdigipot} on the schematic – LTspice
parameters are written inside curly braces
when they are used. If we did not do
anything else the simulation would simply
use 10k as the value of R1. However, in this
case we also have the .sweep command:
Fig.13. Variant of the circuit in Fig.11 with digital signals use to control wiper position.
.step param Rdigipot LIST 8k
10k 12k
This tells LTspice to run the simulation
multiple times with the set of values of
Rdigipot as listed – here three values
are used to represent the nominal value
and extremes of a 10kΩ resistor with
±20% tolerance. This corresponds to a
digipot with total resistance RAB = 10kΩ
and 20% tolerance.
The results of simulating the circuit in
Fig.8 are shown in Fig.9. To identify the
traces right-click on the schematic and select
View -> Step Legend from the menu. You
can also select which steps are displayed
using View -> Select Steps. Individual step
plots can be displayed by adding <at>step_no
after the signal name, for example I(R1)<at>1
to display the current in R1 for step 1 of the
sweep. This is illustrated Fig.10.
Model based on a potentiometer
Fig.14. Results from simulation of the circuit in Fig.13.
Given that digipots are often controlled by
embedded system software, the problem
can be addressed by calibration routines in
the code as long as the circuit is designed
to be usable with the full range of possible
digipot resistance values.
The circuit is Fig.8 shows one approach
to simulating the effect of component value
variation. It is simply a resistor with a
DC voltage applied across it. We perform
a DC sweep simulation, increasing the
voltage from 0 to 5V and plot the current.
To investigate the effect of resistor variation
we could create separate copies of the circuit
(on the same schematic) with different
resistor values, or we could simply change
values and run the simulation again. The
first approach allows the different results
Practical Electronics | January | 2023
to be plotted together, but results in a more
complex overall schematic and it can be
difficult to track which result is which.
The second approach does not allow easy
direct comparison of results.
Using a sweep command
LTspice provides the means to run multiple
simulations of the same circuit with different
component values using the .sweep
command. There are a variety of ways
of using .sweep, which are documented
in the built-in Help. Here we define the
resistor value using a parameter and use a
parameter sweep to change the value. In
LTspice, parameters can be defined using
the .param command, after which they
can be used in many places where you
As mentioned above, an alternative to a
direct circuit implementation (as in Fig.3
and Fig.7) is to use a more abstract model
based on a simple potentiometer. This
requires that the resistor values can be
controlled by mathematical expressions
to relate the resistor values to the control
input – fortunately, this is possible in
LTspice using ‘behavioural resistors’.
We have used behavioural voltage and
current sources (BV and BI elements) a
number of times in previous Circuit Surgery
articles. These sources allow the use of a
mathematical expression to set the voltage
or current – the expression can make use
of other circuit voltages and currents and
simulation time, and a wide range of
mathematical functions are available for
use. The resistance of a resistor (R element,
as in a standard resistor) can also be set by
an expression in similar way. This feature
is not fully documented in LTspice – at the
time of writing, if you look up ‘resistor’
in the built-in Help it is not mentioned.
However, we can use behavioural resistors
to implement a digipot function.
In general, a potentiometer comprises
two resistors R1 + R2 such that the total
resistance R1 + R2 = RAB where RAB is
59
Fig.15. Circuit to narrow digipot
adjustment range. This simulation includes
component tolerance.
the resistance between the terminals A
and B (as in Fig.2). The relative values
of R 1 and R2 depend on the wiper
position. If we define the wiper position
as a value N, where N = 0 with the
wiper at B and N = 1 with the wiper at
A then we can write if R1 = NRAB and
R2 = (1 − N)RAB. In LTspice we can set up
a voltage on node N, V(N), which can vary
from 0 to 1V to represent N. We can define
a parameter Rdigipot for the RAB value
of the digipot. Then we could use two
behavioural resistors to implement a potentiometer
with values set by expressions using:
R = {Rdigipot}*V(N)
R = {Rdigipot}*(1-V(N))
Things are a bit more complex than this because the
behavioural resistor value must not be set to zero, and
ideally not become negative. We can use the LTspice
limit(x,y,z) function, which returns z unless it
is outside the range set by x and y, in which case x or
y are returned. Using this we can limit the minimum
resistance to some very small value (eg, 1mΩ) and the
maximum to the RAB value (Rdigipot), for example:
R = limit(1m,{Rdigipot},{Rdigipot}*V(N))
Fig.16. Results from simulation of the circuit in Fig.15.
An LTspice schematic using this approach is shown in
Fig.11. The behavioural voltage source (BI) is used to
create a stepped waveform on node N, starting at 0V at
time 0 and stepping every step-time (stept parameter)
by 1/(number of steps) (nsteps parameter) until a
maximum of 1 is reached. The parameter values shown
in Fig.11 step V(N) from 0 to 1V in 8 steps, with each
step lasting 1ms. The results are shown in Fig.12 and
show a similar behaviour to the previous examples.
However, unlike the previous examples, it is easy to
change the effective number of taps (switches) in the
digipot. For example, for 256 switches set nsteps to
256 and the simulation end time to 256ms.
The circuit in Fig.13 is similar to the one
in Fig.12 except the behavioural source
producing V(N) is obtained from a set of
signals (on nodes N0 to N3) representing a
4-bit binary control word for the digipot. This
provides a more realistic control input but
requires the additional sources to generate
the digital control signals. The B1 source uses
a weighted sum of the digital bits (which
are at 0V or 1V for logic 0 and 1) to produce
the control voltage V(N). The results are
shown in Fig.14 and are as expected. There
are some glitches on V(N) caused by the
relative switching times of the digital signals
Simulation files
Fig.17. LTspice circuit to investigate the effect of wiper resistance when using rheostat mode.
60
Most, but not every month, LTSpice
is used to support descriptions and
analysis in Circuit Surgery.
The examples and files are available
for download from the PE website.
Practical Electronics | January | 2023
Fig.18.
Results
from
simulation
of the
circuit in
Fig.17.
www.poscope.com/epe
which could be fixed by refining the timing.
Fig.15 shows a circuit in which the digipot
is placed between two fixed resistors. This
technique narrows the proportion of the
potential divider output which is controlled
by the digipot – it is not unusual to require
an adjustment range significantly smaller
than 0 to 100% of the input (as provided by
the circuit in Fig.11). For a given number
of taps (wiper steps) this increases the
resolution with which the output can be
controlled. This simulation is run with
value variation for the digipot of ±20%
for a nominal value of 10kΩ using the
approach discussed earlier. The input is
simply 8V DC so the output will be a DC
value as set by the potential divider formed
by the four resistors.
Digipot resistance variation
The results are shown in Fig.16. Here
we can see that the variation in digipot
resistance results in a variation in the
range of output voltages that can be set.
This is potentially a major problem – if
the circuit was designed to utilise the full
control range available with the nominal
10kΩ resistance, individual digipots with
smaller resistance would not be able to
control the full range of output levels. The
design should be based on the worst case
(in this case 8kΩ gives the smallest control
range – green trace for V(out)<at>1). Another
problem here is that different control
inputs give different output levels with
different digipot resistance values. This
could be accounted for using calibration
procedures in software. For example, if
the individual digipot resistance value
was known and stored in non-volatile
Practical Electronics | January | 2023
memory, then microcontroller software
could use the value in calculations to set
the required control value.
Wiper resistance
Previously, we mentioned that digipots
have a wiper resistance – this can affect
the performance of circuits. For example,
if a digipot is used in rheostat mode (single
variable resistor) the wiper resistance will
contribute to the total resistance. Fig.17
shows three circuits using a digipot in
rheostat mode. The top two circuits have
a relatively large wiper resistance (500Ω)
to show its effect and the lower circuit
has minimal wiper resistance (1mΩ) as a
reference for comparison. In rheostat mode,
one terminal of the potentiometer is not used
– it can either be shorted to the wiper (top
left in Fig.17) or left disconnected (top right).
The results in Fig.18 show that the two
spare terminal options produce different
behaviours. The top pane plots the resistance
of all three rheostats against time as the
control input is stepped from 0 to 1 (zero
to maximum resistance in 256 steps). The
reference rheostat (green trace) has the lowest
total resistance, and the others are larger due
to the wiper resistance being included in
the total value. The lower pane shows the
difference between the reference value and
the top two circuits. The circuit with the
disconnected spare terminal has a constant
difference equal to the wiper resistance.
The circuit with the shorted spare terminal
has a lower difference (is closer to the
ideal value) but the difference varies with
wiper position, which would make it more
difficult to account for the wiper resistance
in software calibration.
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