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Circuit Surgery Regular clinic by Ian Bell Electronically controlled resistance – Part 1 R ecently, on the EEWeb Fig.1). A potentiometer has A A a ‘wiper’ terminal which Control input Control input connects to a variable location (R value) (wiper position) Wiper R R on a resistance or chain of resistors. The resistance of the potentiometer (between Electronically controlled resistance – Part 1B B A and B in Fig.1) is fixed Single resistor (rheostat) Potentiometer and the control (mechanical or electronic) sets the value Fig.1. Electronically controlled resistors. of the resistance fromcontrolled A to 1 1 Electronically resistance –1 Part11 1 = + + two + ⋯parallel + the wiper, and from B to the wiper. This resistors (as in 𝑅𝑅! 𝑅𝑅"For𝑅𝑅just 𝑅𝑅 𝑅𝑅 # $ % can be anything from zero to the A to Kintaro’s circuit shown in Fig.2) the total B resistance, with the two summing to resistance is: the A-to-B resistance. FETs naturally 1 1 1 𝑅𝑅"1𝑅𝑅# 1 + ⋯+ form single voltage-controlled resistors= 𝑅𝑅+! = + 𝑅𝑅! 𝑅𝑅" 𝑅𝑅# 𝑅𝑅" 𝑅𝑅 𝑅𝑅% +$ 𝑅𝑅# (rheostats), whereas digitally controlled resistors are available in both rheostat and In Kintaro’s application one resistor is potentiometer versions. fixed (say R1) and the other (R2) is varied to 𝑅𝑅" 𝑅𝑅!# All components have limits to the range obtain 𝑅𝑅#! = the desired RT. We can rearrange the + 𝑅𝑅!# "− of voltages and currents that they can above 𝑅𝑅 equation to give the required R2 value handle, but these may be more restricted to achieve a specified total resistance RT: for electronically controlled resistors 𝑅𝑅" 𝑅𝑅! than similar value mechanical devices. Electronic control of resistance 𝑅𝑅# = 𝑅𝑅 " − 𝑅𝑅! Electronically controlled resistors may have There are a couple of widely used ways other restrictions such as the requirement of achieving an electronically controlled This is not a linear function – see Fig.3 – for one end to be grounded. resistor (other approaches are possible). which shows the R2 value required to obtain Electronically controlled resistors could First, field-effect transistors (FETs) can be RT in the range 1 to 9Ω with R1 = 10Ω. If be considered in any application where a used as voltage-controlled resistors. Both the original control voltage (X in Kintaro’s mechanical variable resistor, potentiometer JFETs (junction field-effect transistors) and post) is linear, and R2 varies linearly with or trimmer might be used but you want to MOSFETs (metal-oxide-semiconductor its control voltage, then it cannot be used facilitate digital (computer/microcontroller) field-effect transistors) can be employed directly to linearly control RT (in Fig.2). control and thus increase a designs for this purpose, but JFETs are quite To achieve a linear control, it would be functionality. Voltage-controlled resistors common for this application. Second, necessary to map the input control voltage are commonly used to provide analogue there are numerous digital potentiometer (Kintaro’s X) to the required control voltage control of amplifiers’ and filters’ (gain and ICs available. These typically contain a for R2. This could possibly be achieved frequency) response in applications such network of resistors and switches and are by a microcontroller measuring voltage as automatic gain control (AGC), adaptive designed for use with microcontrollers, X (via an ADC) and finding the required filters and voltage-controlled oscillators. often via a serial bus such as SPI or resistor control voltage, either using a I2C. The digital instruction determines look up table, or via calculation with the above equation. A DAC could set the R2 the state of the switches, which in turn Parallel resistors control the resistance. Kintaro’s EEWeb post describes a parallel control voltage. As with mechanical variable resistors, combination of a fixed resistor with an electronically controlled resistors can be electronically controlled resistor (see either single resistors (sometimes referred Fig.2). We will look briefly, and in very Control voltage to as a ‘rheostats’) or potentiometers (see general terms, at this scenario. One of RT R1 R2 (voltage (fixed) the best-known formulas in electronics is controlled) the total resistance RT of a set of parallel Simulation fi les Electronically controlled resistance – Part 12, R3 …RN. The reciprocal resistors R 1, R Most, but not every month, LTSpice of RT is the sum of the reciprocals of is used to support descriptions and parallel resistors: analysis in Circuit Surgery. Fig.2. Fixed resistor R1 in parallel with The examples and files are available 1 1 1 1 1 a voltage-controlled resistor R2 giving a = + + + ⋯+ for download from the PE website. 𝑅𝑅% 𝑅𝑅! 𝑅𝑅" 𝑅𝑅# 𝑅𝑅$ total resistance RT. forum, user Kintaro posted a question about controlling resistance electronically. ‘Right now, I have two values known, these are the voltage of a node (X volt) and a resistor (Y ohm). This circuit needs to interpret X volt as X ohm, and then tune the adjustable resistor to Z ohm (because the Y ohm resistance and Z ohm resistance in parallel give us the X ohm resistance. The resulting circuit should work for all the values of known values of the voltage node and the resistor.’ The key thing here is the ability to control a resistance with a voltage – the requirement for a parallel resistor is specific to Kintaro’s application and can be achieved if the adjustable resistor can be set to the required value. We will look briefly at this and then consider electronically controlled resistance more generally. 44 𝑅𝑅" 𝑅𝑅# 𝑅𝑅! = 𝑅𝑅" + 𝑅𝑅# Practical Electronics | September | 2022 Fig.3. R2 needed for the Fig.2 circuit to achieve the specified total resistance with R1 =10Ω. We do not know if the above solution is viable as we do not know the required response time, or any other details. Another issue is that the description of X volts to X ohms would imply low resistance values with typical circuit voltages in the units to tens of volts range and this might be difficult to achieve. FETs as voltage-controlled resistors As mentioned above, a JFET is commonly used to implement voltage-controlled resistance. The circuit in Fig.4 is an LTspice schematic which can be used to plot the characteristics of the device. JFETs have three terminals: gate, source and drain. The gate-source voltage (VGS) (supplied by source VGS in the circuit in Fig.4) controls the drain current (ID), which will also depends on the drain-source voltage (VDS) (supplied by VDS in our schematic). The polarity of voltages and currents for a JFET depends on the type of device – n-channel or p-channel – a categorisation similar to the difference between NPN and PNP bipolar junction transistors. The circuit in Fig.4 uses an n-channel JFET, which requires a negative gate-source voltage and typically a positive drainsource voltage, although, as we will see, negative drain-source voltages can also be used. The gate-source voltage controls the drain current, which flows into the drain. Note that the gate current is extremely small, so the JEFT is considered ‘voltage controlled’, unlike the bipolar transistor where we can consider either the base current or base-emitter voltage as controlling the collector current. The LTspice simulation is configured to sweep both the drain-source voltage and gate-source voltage over a typical operating range, which results in the characteristics plot shown in Fig.5. This is similar to the characteristic plots you are likely to see in device data sheets. The plot in Fig.5 is achieved using a DC sweep simulation (.dc SPICE directive) with two swept voltage sources. The first swept source is VDS – these voltages will Fig.4. LTspice circuit for plotting JFET characteristics by varying VGS and VDS. Practical Electronics | September | 2022 be the x-axis of the plots produced by LTspice. The second swept source is VGS – each value this source takes will produce a separate curve on the plot. The plotted value is the drain current Id(JI), which is selected for plotting in the same way as other types of simulation operation and is the y-axis of the graph. The values VDS 0 5 0.01 in the .dc directive (in Fig.4) specify that the VDS source (drain-source voltage) will be stepped from 0 to 5V in 0.01V steps. This produces a large number of datapoints on each curve which facilitates zooming in on the results. The values in the .dc directive VGS 0 −2 0.25 specify that the VGS source (gate-source voltage) will be stepped from 0 to −2V in 0.25V steps – this is nine values, each of which will produce a separate curve on the plot (see Fig.5). (Note that we do not specify anywhere near as many steps on this second source sweep as with the first as too large a number would crowd the graph with an excess of curve plots.) Fig.6 shows that we can divide the JFET’s characteristics into two regions. The (righthand) saturation region occurs at relatively high drain-source voltages and features a near constant drain current at a given gatesource voltage. This region is employed when the JFET is used as an amplifier. The other (left-hand) region is called the ‘ohmic region’ and is characterised by increasing drain-source voltages resulting in increasing drain current. This is more or less resistive behaviour, but, as is clearly seen in Fig.6 the current-voltage relationship is not linear (the plot lines are not straight throughout the ohmic region). However, if we look at relatively small drain-source voltages the lines are relatively straight – it is this part of the characteristic – within the arc Fig.5. Typical JFET characteristics showing the ‘ohmic’ (left) and saturation (right) regions. 45 drawn near the origin that can be used to implement a voltage-controlled resistor. Fig.7 shows a zoom in of the plot in Fig.6 to cover the region close to the origin. The graph has been extended to include negative drain-source voltages to illustrate the fact that a JFET voltage-controlled resistor works with voltages of either polarity across the ‘resistor’, that is, with either polarity of drain-source voltage. It can be seen that the current-voltage relationship in Fig.7 is fairly linear, but not perfectly so. To get a better insight into the behaviour of the device as a voltage-controlled resistor it is useful to plot the resistance values directly. Ideally, these will be constant (flat line) and different for each gate-source voltage. LTspice is able to plot expressions based on circuit values, so we can plot drain-source voltage divided by the drain current to get the drainsource resistance. Specifically for the circuit in Fig.4 this is found using: V(drain)/ Id(J1). A plot of this is given in Fig.8. This shows the JFET’s resistance varies from about 130Ω to 390Ω as VGS goes from 0V to −2V (at VDS = 0 V). The resistance is fairly constant over the plotted drain-source voltage range of ±600 mV and is better at lower magnitudes Fig.6. Regions of operation in JFET characteristics (ID vs VDS at various VGS). of gate-source voltage. The DC sweep command used to obtain Fig.7 and Fig.8 was slightly different from the one shown in Fig.4, specifically .dc VDS −1.005 5 0.01 VGS 0 −2 0.25. One change is that the VDS source sweep was started at near −1V so that we can plot voltages of both polarities. Also, the start of the sweep was at the odd-seeming value of −1.005V. This is to prevent a datapoint occurring at V(drain) = 0, because this results in zero drain current and hence the calculated resistance value is also zero. Although the actual resistance is not zero it cannot be calculated at a zero voltage, zero current point. This creates an anomaly in the plot that is avoided by the sweep values used. Note that although the plots in Fig.7 and Fig.8 are produced by zooming into LTspice, the large number of datapoints means that the curves are still accurate. Fig.8 shows that the JFET’s resistance is not completely constant with changing drain-source voltage. This will tend to cause distortion if the JFET ‘resistor’ is used in a signal path (we discussed distortion in detail in the Fig.7. JFET characteristics for various gate-source voltages for drainlast three Circuit Surgery articles). The JFET’s resistance source voltages around zero. tends to increase as the drain-source voltage increases. It is possible to compensate for this by feeding back the drain-source voltage to increase the gate-source voltage at higher drain-source voltages. This will increase the drain current (with respect to a device with no feedback), resulting in a lower effective resistance. A circuit to implement a more constant resistance is shown in Fig.9. The resistors used for the feedback must be large to prevent loading any circuit in which the JFET is used as a voltage-controlled resistor. 1MΩ is used in Fig.9, although we do not have any other circuitry to worry about. Hundreds of kilohms to megohms are typically used in such circuits. Simulation results for the circuit in Fig.9 are shown in Fig.10 in a similar form to Fig.7 and Fig.8. The DC sweep was changed to account for the fact that the resistors R1 Fig.8. JFET drain-source resistance for various gatesource voltages for drain-source voltages around zero. 46 Practical Electronics | September | 2022 BACK ISSUES Practical Electronics Build an RGB display project using a Micromite Plus Timing and metastability in synchronous circuits Construct a transistor radio Frequency Reference Mastering Signal Distributor RFID tags for your projects Practical Electronics The UK’s premier electronics and computing maker magazine Circuit Surgery Audio Out Make it with Micromite WIN! Microchip Curiosity HPC Development Board Make it with Micromite Fun display project using a Micromite Plus Nutube Guitar Overdrive and Distortion Pedal WIN! and R2 act as a divide-by-two voltage divider with respect to the effect of the control voltage (V2 source) on the gate-source voltage of the JFET. This voltage range and step size are doubled to −4V and 0.5V respectively to account for this. The results show a significant improvement in the linearity of the effective resistance – in other words, the resistance does not vary much with drain-source voltage (voltage across the ‘resistor’). The JFET used in these examples was simply the first one in the list in LTspice. It was not chosen as an optimal device for voltage-controlled resistance applications but is sufficient to show the basic principles and the fact that any JFET can be used this way. JFETs optimised for use as voltage-controlled resistors are available, for example the VCR4N n-channel voltage-controlled resistor JFET from InterFET. These devices may well be (much) <at>practicalelec Audio Out Make it with Micromite Accessing Internet data with your MKC Superb microphone preamplifier Touchscreen Wide-range RCL Box Microchip PIC24F LCD and USB Curiosity Development Board WIN! Microchip MCP19114 Flyback Standalone Evaluation Board Apr 2021 £4.99 04 9 772632 573016 practicalelectronics PLUS! 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Superb PE PIC Development Board Practical Electronics The UK’s premier electronics and computing maker magazine WIN! Meet the Cricket: making IoT designs super easy! Programmable Thermal Regulator Fig.9. JFET voltage-controlled resistor with feedback to give more constant resistance as drain-source voltage varies. Audio Out How to make a transistor radio – N NEW E EW PE D NA – ES M IG E N ! Practical Electronics The UK’s premier electronics and computing maker magazine Circuit Surgery Timing and metastability in synchronous circuits – N NEW E EW PE D NA – ES M IG E N ! BACK ISSUES – ONLY £6.49 <at>practicalelec Sep 2020 £4.99 09 9 772632 573016 practicalelectronics Making a splash with NeoPixels! Fun LED Christmas Tree offer! PLUS! Techno Talk – Triumph or travesty? Cool Beans – Mastering NeoPixel programming Net Work – The (electric) car’s the star! www.electronpublishing.com <at>practicalelec Dec 2020 £4.99 12 9 772632 573016 practicalelectronics We can supply back issues of PE/EPE by post. We stock magazines back to 2006, except for the following: 2006 Jan, Feb, Mar, Apr, May, Jul 2007 Jun, Jul, Aug 2008 Aug, Nov, Dec 2009 Jan, Mar, Apr 2010 May, Jun, Jul, Aug, Oct, Nov 2011 Jan 2014 Jan 2018 Jan, Nov, Dec 2019 Jan, Feb, Apr, May, Jun Issues from Jan 1999 are available on CD-ROM / DVD-ROM If we do not have a a paper version of a particular issue, then a PDF can be supplied – your email address must be included on your order. Please make sure all components are still available before commencing any project from a back-dated issue. Input R1 + U1 R2 Control R3 Output – J1 R4 R5 Fig.11. Amplifier with gain control using a JFET voltage-controlled resistor. more expensive, for example, at the time of wiring a single 2N3819 is 93p from Mouser, whereas the VCR4N is £11.54. Finally, Fig.11 shows one example of a circuit using a JFET voltage-controlled resistor. This is an amplifier with voltage-controlled gain. Resistor R1 and the voltage-controlled resistor formed by the JFET (J1) and the feedback resistors (R2 and R3) form a potential divider. The output level from this will depend on the controlled resistance value. It is then buffered and amplified by the op amp. The control voltage is negative (as in the circuits in Fig.4 and Fig.9), but this is not a major problem with a typical split supply for an op amp circuit. The input signal needs be centred on 0V and of sufficiently small amplitude to keep the JEFT circuit operating at a constant linear resistance at a given control voltage. Fig.10. JFET characteristics and drain-source resistance with feedback applied as shown in the simulation circuit in Fig.9. Practical Electronics | September | 2022 47